Inventor

THOMAS MICHAEL E

US58 patents

⚠️ This page may combine multiple inventors who share the name “THOMAS MICHAEL E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

THOMAS MICHAEL E

NAT SEMICONDUCTOR CORP

Thermal oxidation method utilizing atomic oxygen to reduce dangling bonds in silicon dioxide grown on silicon

Polishing pad for planarization

Method of providing a dielectric structure for semiconductor devices

Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD

Programmable anti-fuses using laser writing

Integrated circuit vertical electronic grid device and method

Integrated circuit electronic grid device and method

High value tantalum oxide capacitor

Apparatus and method for detecting vertically propagated defects in integrated circuits

Method for preventing substrate backside deposition during a chemical vapor deposition operation

Gas-based backside protection during substrate processing

High efficiency semiconductor wafer coating apparatus and method

High temperature interconnect system for an integrated circuit

Apparatus and method for high-accuracy alignment

Gas distribution head for plasma deposition and etch systems

Method of bonding semiconductor chips to a substrate

Method of fabricating an optical interconnect structure

Optical interconnects

Method for decreasing contact resistance of an electrode positioned inside a misaligned via for multilevel interconnects

Method for silicide stringer removal in the fabrication of semiconductor integrated circuits

Wafer carrier

Method of making an integrated circuit microwave interconnect and components

Box isolation technique for integrated circuit structures

Semiconductor device with self aligned contacts having integrated silicide stringer removal and method thereof

Method of using organic material to enhance STI planarization or other planarization processes

Method for solid-state formation of diamond

Method of performing charged-particle lithography

Optical interconnects

Ion milling to obtain planarization

Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD

Self-aligned interconnect using high selectivity metal pillars and a via exclusion mask

FAIRCHILD CAMERA INSTR CO

High performance interconnect system for an integrated circuit

High temperature interconnect system for an integrated circuit

Structure for inhibiting dopant out-diffusion

Method and structure for inhibiting dopant out-diffusion

Impregnation of aluminum interconnects with copper

FRAMDRIVE

Ferroelectric storage device emulating a rotating disk drive unit in acomputer system and having a parallel data interface

Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having an optical data interface

Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having an optical and parallel data interface

Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having a multiplexed optical data interface

Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having a parallel and multiplexed optical data interface

FAIRCHILD SEMICONDUCTOR

High performance interconnect system for an integrated circuit

Method of fabricating a high performance interconnect system for an integrated circuit

Process for forming vias on integrated circuits

Apparatus and method for detecting spot defects in integrated circuits

(unassigned)

Sports helmet transparent guard assembly

Integrated read/write head for ferroelectric optical media

Integrated read/write head for ferroelectric optical storage

SAADAT IRFAN

Process for making microcomponents integrated circuits

GEN FOODS CORP

Meat analog having a protein-gum-starch matrix