Inventor
WHITEFIELD BRUCE
US19 patents
⚠️ This page may combine multiple inventors who share the name “WHITEFIELD BRUCE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
15 patentsUS6936920B2Aug 30, 2005
Voltage contrast monitor for integrated circuit defects
LSI LOGIC CORP65 citations96
US6943042B2Sep 13, 2005
Method of detecting spatially correlated variations in a parameter of an integrated circuit die
LSI LOGIC CORP19 citations91
US6787379B1Sep 7, 2004
Method of detecting spatially correlated variations in a parameter of an integrated circuit die
LSI LOGIC CORP17 citations91
US6495312B1Dec 17, 2002
Method and apparatus for removing photoresist edge beads from thin film substrates
LSI LOGIC CORP30 citations90
US6650958B1Nov 18, 2003
Integrated process tool monitoring system for semiconductor fabrication
LSI LOGIC CORP20 citations87
US7074710B2Jul 11, 2006
Method of wafer patterning for reducing edge exclusion zone
LSI LOGIC CORP12 citations83
US6614507B2Sep 2, 2003
Apparatus for removing photoresist edge beads from thin film substrates
LSI LOGIC CORP14 citations82
US5379233AJan 3, 1995
Method and structure for improving patterning design for processing
LSI LOGIC CORP13 citations81
US5654897AAug 5, 1997
Method and structure for improving patterning design for processing
LSI LOGIC CORP10 citations72
US5477466ADec 19, 1995
Method and structure for improving patterning design for processing
LSI LOGIC CORP13 citations72
US6767692B1Jul 27, 2004
Process for inhibiting edge peeling of coating on semiconductor substrate during formation of integrated circuit structure thereon
LSI LOGIC CORP11 citations70
US7560292B2Jul 14, 2009
Voltage contrast monitor for integrated circuit defects
LSI LOGIC CORP1 citations62
US6971944B2Dec 6, 2005
Method and control system for improving CMP process by detecting and reacting to harmonic oscillation
LSI LOGIC CORP3 citations62
US6986112B2Jan 10, 2006
Method of mapping logic failures in an integrated circuit die
LSI LOGIC CORP4 citations60
US7323768B2Jan 29, 2008
Voltage contrast monitor for integrated circuit defects
LSI LOGIC CORP0 citations52
LSI CORP
4 patentsUS7460211B2Dec 2, 2008
Apparatus for wafer patterning to reduce edge exclusion zone
LSI CORP16 citations92
US7312880B2Dec 25, 2007
Wafer edge structure measurement method
LSI CORP7 citations63
US7799166B2Sep 21, 2010
Wafer edge expose alignment method
LSI CORP4 citations62
US7653523B2Jan 26, 2010
Method for calculating high-resolution wafer parameter profiles
LSI CORP0 citations41