P

Inventor

CHIANG CHIEN

US38 patents
⚠️ This page may combine multiple inventors who share the name “CHIANG CHIEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

29 patents
US6861267B2Mar 1, 2005

Reducing shunts in memories with phase-change material

INTEL CORP334 citations99
US6797979B2Sep 28, 2004

Metal structure for a phase-change memory device

INTEL CORP294 citations99
US6569705B2May 27, 2003

Metal structure for a phase-change memory device

INTEL CORP345 citations99
US6545287B2Apr 8, 2003

Using selective deposition to form phase-change memory cells

INTEL CORP372 citations99
US6339544B1Jan 15, 2002

Method to enhance performance of thermal resistor device

INTEL CORP756 citations99
US5817572AOct 6, 1998

Method for forming multileves interconnections for semiconductor fabrication

INTEL CORP242 citations99
US5739579AApr 14, 1998

Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections

INTEL CORP427 citations99
US6404665B1Jun 11, 2002

Compositionally modified resistive electrode

INTEL CORP229 citations98
US6143647ANov 7, 2000

Silicon-rich block copolymers to achieve unbalanced vias

INTEL CORP93 citations98
US6848177B2Feb 1, 2005

Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme

INTEL CORP86 citations97
US6303464B1Oct 16, 2001

Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer

INTEL CORP87 citations96
US6051869AApr 18, 2000

Silicon-rich block copolymers to achieve unbalanced vias

INTEL CORP60 citations96
US5886410AMar 23, 1999

Interconnect structure with hard mask and low dielectric constant materials

INTEL CORP110 citations96
US6309956B1Oct 30, 2001

Fabricating low K dielectric interconnect systems by using dummy structures to enhance process

INTEL CORP138 citations95
US6027995AFeb 22, 2000

Method for fabricating an interconnect structure with hard mask and low dielectric constant materials

INTEL CORP59 citations94
US5935868AAug 10, 1999

Interconnect structure and method to achieve unlanded vias for low dielectric constant materials

INTEL CORP69 citations94
US7217945B2May 15, 2007

Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory cell and structures obtained thereby

INTEL CORP15 citations93
US7214632B2May 8, 2007

Using selective deposition to form phase-change memory cells

INTEL CORP19 citations93
US7183567B2Feb 27, 2007

Using selective deposition to form phase-change memory cells

INTEL CORP16 citations93
US6777320B1Aug 17, 2004

In-plane on-chip decoupling capacitors and method for making same

INTEL CORP29 citations93
US6239019B1May 29, 2001

Interconnect structure using a combination of hard dielectric and polymer as interlayer dielectrics

INTEL CORP17 citations93
US6040628AMar 21, 2000

Interconnect structure using a combination of hard dielectric and polymer as interlayer dielectrics

INTEL CORP36 citations93
US6277765B1Aug 21, 2001

Low-K Dielectric layer and method of making same

INTEL CORP47 citations92
US5880030AMar 9, 1999

Unlanded via structure and method for making same

INTEL CORP30 citations92
US6037249AMar 14, 2000

Method for forming air gaps for advanced interconnect systems

INTEL CORP48 citations89
US7112887B2Sep 26, 2006

Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme

INTEL CORP15 citations83
US6770524B2Aug 3, 2004

Method to enhance performance of thermal resistor device

INTEL CORP6 citations74
US6949831B2Sep 27, 2005

In-plane on-chip decoupling capacitors and method for making same

INTEL CORP2 citations63
US7161225B2Jan 9, 2007

Reducing shunts in memories with phase-change material

INTEL CORP1 citations52

OVONYX INC

7 patents

WU TOM

1 patent

NOVELLUS SYSTEMS INC

1 patent