Inventor

WISE RICK L

US33 patents

⚠️ This page may combine multiple inventors who share the name “WISE RICK L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WISE RICK L

TEXAS INSTRUMENTS INC

Integrated circuit and method

Method of and apparatus for purifying reduced pressure process chambers

Integrated circuit isolation

Corrugated post capacitor and method of fabricating using selective silicon deposition

Method of forming thin epitaxial layers using multistep growth for autodoping control

Method of fabricating a dynamic random access memory (DRAM) cell capacitor using hemispherical grain (HSG) polysilicon and selective polysilicon etchback

Capacitor and memory structure and method

Capacitor and memory structure and method

Temperature compensated bulk acoustic wave resonator with a high coupling coefficient

Rapid thermal annealing of doped polycrystalline silicon structures formed in a single-wafer cluster tool

Process for controlling autodoping during epitaxial silicon deposition

Semiconductor device made by the method of producing hybrid orientnation (100) strained silicon with (110) silicon

Method of manufacture for a trench isolation structure having an implanted buffer layer

Contaminant resistant barriers to prevent outgassing

Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate

Post-in-crown capacitor and method of manufacture

Process for monitoring the thickness of layers in a microelectronic device

High mobility transistors

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Ultrashallow emitter formation using ALD and high temperature short time annealing

High mobility transistors

High mobility transistors

Trench isolation structure having an implanted buffer layer

Trench isolation structure and a method of manufacture therefor

High mobility transistors

High mobility transistors

Layer transfer of silicon onto III-nitride material for heterogenous integration

XIONG WEIZE

Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

WISE RICK L

Ultrashallow emitter formation using ALD and high temperature short time annealing

PINTO ANGELO

Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology

SUCHER BRADLEY DAVID

Accelerated furnace ramp rates for reduced slip