Inventor

HWANG YOO-SANG

KR91 patents

⚠️ This page may combine multiple inventors who share the name “HWANG YOO-SANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HWANG YOO-SANG

SAMSUNG ELECTRONICS CO LTD

Method for fabricating DRAM cell using a protection layer

Methods of forming self-aligned contact pads using a damascene gate process

Method of manufacturing semiconductor device with contact body extending in direction of bit line to contact storage node

Semiconductor device having a self-aligned contact structure and methods of forming the same

Semiconductor device having a self-aligned contact structure and methods of forming the same

Methods of forming integrated circuit devices including cylindrical capacitors having supporters between lower electrodes

Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof

Cylindrical capacitors having a stepped sidewall and methods for fabricating the same

Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof

DRAM cell capacitor and manufacturing method thereof

Methods of forming ferroelectric random access memory devices having shared capacitor electrodes

Semiconductor device with pillar-shaped capacitor storage node and method of fabricating the same

Integrated circuit devices and methods of manufacturing same

Semiconductor device and method for fabricating the same

Methods of manufacturing semiconductor devices having buried contacts and related semiconductor devices

Semiconductor device including landing pad

Methods for fabricating a semiconductor device

Storage node contact forming method and structure for use in semiconductor memory

Semiconductor devices having DRAM cells and methods of fabricating the same

Method of fabricating a DRAM semiconductor device

Semiconductor device and method of fabricating the same

Semiconductor device including a bit line

Method of forming active patterns, active pattern array, and method of manufacturing a semiconductor device

Method of fabricating semiconductor devices having buried contact plugs

Methods for forming resistors for integrated circuit devices

Semiconductor memory device having a decoupling capacitor

Method for manufacturing semiconductor device having increased effective channel length

DRAM cell having electrode with protection layer

Method for manufacturing a semiconductor device including storage nodes of capacitor

Semiconductor device with pillar-shaped capacitor storage node

Semiconductor device and method of fabricating the same

Device comprising 2D material

Semiconductor device having air gap spacer and method of fabricating the same

Method of fabricating device including two-dimensional material

Semiconductor device including air spacer

Memory device including selectively disposed landing pads expanded over signal line

Semiconductor device including landing pad

Semiconductor device

Semiconductor devices having balancing capacitor and methods of forming the same

Method of manufacturing semiconductor device with interconnections and interconnection contacts and a device formed thereby

DRAM cell capacitor and manufacturing method thereof

Capacitor of a semiconductor device and a method of fabricating the same

Storage element for semiconductor capacitor

KIM DAE-IK

Methods of manufacturing semiconductor devices having buried contacts and related semiconductor devices

Method of manufacturing semiconductor device

Semiconductor devices having vertical channel transistors and methods for fabricating the same

KIM HUI-JUNG

Integrated circuit devices including vertical channel transistors with shield lines interposed between bit lines and methods of fabricating the same

KIM SUNG WOO

Integrated circuit devices including separate memory cells on separate regions of individual substrate

KIM JI-YOUNG

Semiconductor devices including dual gate electrode structures and related methods

CHOI JAY-BOK

Methods of fabricating semiconductor devices having buried channel array