Inventor

HUGHES WILLIAM A

US39 patents

⚠️ This page may combine multiple inventors who share the name “HUGHES WILLIAM A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUGHES WILLIAM A

ADVANCED MICRO DEVICES INC

Implementing locks in a distributed processing system

System and method for operating components of an integrated circuit at independent frequencies and/or voltages

Message based power management in a multi-processor system

Message based power management

Store buffer which forwards data based on index and optional way match

Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism

Shared resources in a chip multiprocessor

Core redundancy in a chip multiprocessor for highly reliable systems

Method and apparatus for injecting write data into a cache

Use of a signal line to adjust width and/or frequency of a communication link during system operation

Computer system including a secure execution mode-capable CPU and a security services processor connected via a secure communication path

Initialization of a computer system including a secure execution mode-capable processor

Computer system employing a trusted execution environment including a memory controller configured to clear memory

Mechanism for selectively blocking peripheral device accesses to system memory

Establishing a mode indication responsive to two or more indications

Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency

Memory controller prioritization scheme

Method for efficient buffer tag allocation

Computer system including a novel address translation mechanism

Dynamic resource allocation scheme for efficient use of a queue

Combined system responses in a chip multiprocessor

Processing node including a plurality of processor cores and an interconnect configurable in a test-mode to cause first and second transaction source indicators to be interchanged

Microprocessor employing a technique for restoration of an aborted cycle following a snoop writeback operation

Reducing probe traffic in multiprocessor systems using a victim record table

Communicating between partitions in a statically partitioned multiprocessing system

GLOBALFOUNDRIES INC

Partial CRC insertion in data packets for early forwarding

Shared resources in a chip multiprocessor

Shared resources in a chip multiprocessor

Command packet packing to mitigate CRC overhead

HUGHES WILLIAM A

Processor power management and method

Crossbar switch with primary and secondary pickers

Command packet packing to mitigate CRC overhead

NAFFZIGER SAMUEL D

System for processor power limit management

Managing multiple operating points for stable virtual frequencies

SAMSUNG ELECTRONICS CO LTD

Removal and optimization of coherence acknowledgement responses in an interconnect

CERION TECHNOLOGIES INC

Variable speed bi-directional planetary grinding or polishing apparatus

DONLEY GREGGORY D

Method and apparatus for selectively bypassing a cache for trace collection in a processor

LEPAK KEVIN M

Method and apparatus for accelerated shared data migration

TSIEN BENJAMIN

Method and circuitry for debugging a power-gated circuit