Inventor

CHAE KWAN-YEOB

KR26 patents

Patents

26 patents

US7486125B2Feb 3, 2009

Delay cells and delay line circuits having the same

SAMSUNG ELECTRONICS CO LTD19 citations92

US7657803B2Feb 2, 2010

Memory controller with a self-test function, and method of testing a memory controller

SAMSUNG ELECTRONICS CO LTD11 citations84

US7447110B2Nov 4, 2008

Integrated circuit devices having dual data rate (DDR) output circuits therein

SAMSUNG ELECTRONICS CO LTD9 citations84

US7394300B2Jul 1, 2008

Adjustable delay cells and delay lines including the same

SAMSUNG ELECTRONICS CO LTD14 citations84

US7234011B2Jun 19, 2007

Advanced microcontroller bus architecture (AMBA) system with reduced power consumption and method of driving AMBA system

SAMSUNG ELECTRONICS CO LTD18 citations84

US10840896B2Nov 17, 2020

Digital measurement circuit and memory system using the same

SAMSUNG ELECTRONICS CO LTD5 citations83

US10050661B2Aug 14, 2018

Modem and RF chips, application processor including the same and operating method thereof

SAMSUNG ELECTRONICS CO LTD5 citations82

US9864720B2Jan 9, 2018

Data processing circuit for controlling sampling point independently and data processing system including the same

SAMSUNG ELECTRONICS CO LTD7 citations79

US7028121B2Apr 11, 2006

Parameter generating circuit for deciding priority of master blocks and method of generating parameter

SAMSUNG ELECTRONICS CO LTD8 citations73

US10862526B2Dec 8, 2020

Modem and RF chips, application processor including the same and operating method thereof

SAMSUNG ELECTRONICS CO LTD1 citations71

US10516433B2Dec 24, 2019

Modem and RF chips, application processor including the same and operating method thereof

SAMSUNG ELECTRONICS CO LTD2 citations71

US9859880B2Jan 2, 2018

Delay cell and delay line having the same

SAMSUNG ELECTRONICS CO LTD2 citations68

US11381231B2Jul 5, 2022

Digital measurement circuit and memory system using the same

SAMSUNG ELECTRONICS CO LTD0 citations62

US10977412B2Apr 13, 2021

Integrated circuit including load standard cell and method of designing the same

SAMSUNG ELECTRONICS CO LTD0 citations62

US8009490B2Aug 30, 2011

Memory interface circuit and memory system including the same

SAMSUNG ELECTRONICS CO LTD6 citations62

US7802123B2Sep 21, 2010

Data processing apparatus and method using FIFO device

SAMSUNG ELECTRONICS CO LTD4 citations62

US7701274B2Apr 20, 2010

Delay locked loop for controlling delay time using shifter and adder and clock delaying method

SAMSUNG ELECTRONICS CO LTD6 citations62

US7254661B2Aug 7, 2007

Methods, circuits, and computer program products for variable bus arbitration

SAMSUNG ELECTRONICS CO LTD2 citations62

US7231569B2Jun 12, 2007

Scan flip-flop circuit with reduced power consumption

SAMSUNG ELECTRONICS CO LTD6 citations62

US7073003B2Jul 4, 2006

Programmable fixed priority and round robin arbiter for providing high-speed arbitration and bus control method therein

SAMSUNG ELECTRONICS CO LTD3 citations62

US7994835B2Aug 9, 2011

Duty control circuit and semiconductor device having the same

SAMSUNG ELECTRONICS CO LTD3 citations59

US7990195B2Aug 2, 2011

Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes

SAMSUNG ELECTRONICS CO LTD2 citations58

US7429872B2Sep 30, 2008

CHAE KWAN-YEOB

Patents

Delay cells and delay line circuits having the same

Memory controller with a self-test function, and method of testing a memory controller

Integrated circuit devices having dual data rate (DDR) output circuits therein

Adjustable delay cells and delay lines including the same

Advanced microcontroller bus architecture (AMBA) system with reduced power consumption and method of driving AMBA system

Digital measurement circuit and memory system using the same

Modem and RF chips, application processor including the same and operating method thereof

Data processing circuit for controlling sampling point independently and data processing system including the same

Parameter generating circuit for deciding priority of master blocks and method of generating parameter

Modem and RF chips, application processor including the same and operating method thereof

Modem and RF chips, application processor including the same and operating method thereof

Delay cell and delay line having the same

Digital measurement circuit and memory system using the same

Integrated circuit including load standard cell and method of designing the same

Memory interface circuit and memory system including the same

Data processing apparatus and method using FIFO device

Delay locked loop for controlling delay time using shifter and adder and clock delaying method

Methods, circuits, and computer program products for variable bus arbitration

Scan flip-flop circuit with reduced power consumption

Programmable fixed priority and round robin arbiter for providing high-speed arbitration and bus control method therein

Duty control circuit and semiconductor device having the same

Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes

Logic circuit combining exclusive OR gate and exclusive NOR gate

Comparator having small size and improved operating speed

Semiconductor device

Delay locked loop circuit and integrated circuit including the same