Inventor
KIDA MUNENOBU
JP3 patents
Patents
3 patentsUS5034629AJul 23, 1991
Output control circuit for reducing through current in CMOS output buffer
TOSHIBA KK49 citations91
US5107137AApr 21, 1992
Master-slave clocked cmos flip-flop with hysteresis
TOSHIBA KK31 citations87
US5402005AMar 28, 1995
Semiconductor device having a multilayered wiring structure
TOSHIBA KK4 citations56