Inventor
TAN SIN S
US14 patents
⚠️ This page may combine multiple inventors who share the name “TAN SIN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
5 patentsUS9141469B2Sep 22, 2015
Efficient and scalable cyclic redundancy check circuit using Galois-field arithmetic
INTEL CORP5 citations72
US6622215B2Sep 16, 2003
Mechanism for handling conflicts in a multi-node computer architecture
INTEL CORP4 citations62
US6832268B2Dec 14, 2004
Mechanism to guarantee forward progress for incoming coherent input/output (I/O) transactions for caching I/O agent on address conflict with processor transactions
INTEL CORP4 citations58
US9935653B2Apr 3, 2018
Enhanced cyclical redundancy check circuit based on galois-field arithmetic
INTEL CORP0 citations51
US7500029B2Mar 3, 2009
Maximal length packets
INTEL CORP0 citations39
TAN SIN S
3 patentsUS8782456B2Jul 15, 2014
Dynamic and idle power reduction sequence using recombinant clock and power gating
TAN SIN S10 citations82
US8812878B2Aug 19, 2014
Limiting false wakeups of computing device components coupled via links
TAN SIN S5 citations70
US7386643B2Jun 10, 2008
Mechanism to guarantee forward progress for incoming coherent input/output (I/O) transactions for caching I/O agent on address conflict with processor transactions
TAN SIN S0 citations46