Inventor

KRUGER WARREN FRITZ

US33 patents

⚠️ This page may combine multiple inventors who share the name “KRUGER WARREN FRITZ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KRUGER WARREN FRITZ

SANDISK TECHNOLOGIES LLC

Process and apparatus to reduce declared capacity of a storage device by altering an encoding format

Notification of trigger condition to reduce declared capacity of a storage device in a multi-storage-device storage system

Host system and process to reduce declared capacity of a storage device by trimming

Process and apparatus to reduce declared capacity of a storage device by making specific logical addresses unavailable

Process and apparatus to reduce declared capacity of a storage device by reducing a count of logical addresses

Process and apparatus to reduce declared capacity of a storage device by moving data

Triggering a process to reduce declared capacity of a storage device in a multi-storage-device storage system

Notification of trigger condition to reduce declared capacity of a storage device

Process and apparatus to reduce declared capacity of a storage device by reducing a range of logical addresses

Process and apparatus to reduce declared capacity of a storage device by deleting data

Triggering, at a host system, a process to reduce declared capacity of a storage device

SANDISK TECHNOLOGIES INC

Method and system for rebalancing data stored in flash memory devices

Method and system for migrating data between flash memory devices

Process and apparatus to reduce declared capacity of a storage device by conditionally trimming

Triggering a process to reduce declared capacity of a storage device

Process and apparatus to reduce declared capacity of a storage device by trimming

WESTERN DIGITAL TECH INC

Offloaded disaggregated storage architecture

Redundancy coding stripe based on coordinated internal address scheme across multiple devices

Non-volatile memory over fabric controller with memory bypass

NYGREN AARON JOHN

Command protocol for adjustment of write timing delay

Adjustment of write timing based on error detection techniques

Adjustment of write timing based on a training signal

NYGREN AARON

Method and apparatus synchronizing integrated circuit clocks

Method and apparatus synchronizing integrated circuit clocks

O'CONNOR JAMES

Unified data masking, data poisoning, and data bus inversion signaling

MOREIN STEPHEN

Peer-to-peer special purpose processor architecture and method

LEE MING-JU EDWARD

Adjustment of write timing in a memory device

NYGREN AARON J

Data bus inversion coding

SADOWSKI GREG

Static image retiling and power management method and circuit

KRUGER WARREN FRITZ

Methods and systems to facilitate operation in unpinned memory

ROGERS PHILIP J

Systems and methods for processing memory requests in a multi-processor system using a probe engine

ADVANCED MICRO DEVICES INC

Adjustment of write timing in a memory device

ETSCHEID BRIAN

Aperture compression for multiple data streams