Inventor

HOANG TIM TRI

US94 patents

⚠️ This page may combine multiple inventors who share the name “HOANG TIM TRI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOANG TIM TRI

ALTERA CORP

Signal loss detector for high-speed serial interface of a programmable logic device

Apparatus and methods for adjusting performance characteristics and power consumption of programmable logic devices

Clock distribution techniques for channels

Techniques for dynamically adjusting the frequency range of phase-locked loops

Low-power transceiver architectures for programmable logic integrated circuit devices

Circuits and methods for impedance calibration

Techniques for adjusting gears of an oscillator

Half-rate DFE with duplicate path for high data-rate operation

Techniques for compensating delays in clock signals on integrated circuits

Techniques for reconfiguring programmable circuit blocks

H-tree driver circuitry

Techniques for phase interpolation

Signal detect for high-speed serial interface

High-speed serial data signal interface architectures for programmable logic devices

Clock signal circuitry for multi-channel data signaling

Low-power transceiver architectures for programmable logic integrated circuit devices

Power supply circuitry for data signal transceivers on integrated circuits

Modular serial interface in programmable logic device

Signal amplitude detection circuitry without pattern dependencies for high-speed serial links

Integration of high-speed serial interface circuitry into programmable logic device architectures

Modular buffering circuitry for multi-channel transceiver clock and other signals

Clock circuitry for programmable logic devices

Systems and methods for reducing power supply noise or jitter

Circuits and methods for adjusting the voltage swing of a signal

Clock data recovery circuitry with programmable clock phase selection

Programmable high-speed voltage-mode differential driver

Loop circuits that reduce bandwidth variations

Systems and methods for reducing power supply noise or jitter

Leakage compensation and improved setup/hold time in a dynamic flip-flop

Level shifter circuit with a thin gate oxide transistor

Integrated circuit architectures with heterogeneous high-speed serial interface circuitry

Variable-bandwidth loop filter methods and apparatus

Variable external interface circuitry on programmable logic device integrated circuits

Phase-locked loop architecture and clock distribution system

PHAM TIEN DUC

Phase-locked loop architecture and clock distribution system

Multi-purpose phase-locked loop for low cost transceiver

RAMAN SANGEETA

Receiver equalizer circuitry having wide data rate and input common mode voltage ranges

Technique for providing loopback testing with single stage equalizer

HOANG TIM TRI

Techniques for varying a periodic signal based on changes in a data rate

Wide range and dynamically reconfigurable clock data recovery architecture

DING WEIQI

Techniques for reducing duty cycle distortion in periodic signals

WONG WILSON

Adaptive equalization using data level detection

SHUMARAYEV SERGEY

Differential interfaces for power domain crossings

ZALIZNYAK ARCH

Apparatus and methods for serial interfaces with shared datapaths

NGUYEN TOAN THANH

Multiple channel bonding in a high speed clock network

LAI TIN H

Equalization circuitry including a digital-to-analog converter having a voltage divider and a multiplexer

LUO MEI

Techniques for decision feedback equalization that reduce variations in the tap weight

TRAN THUNGOC M

High-speed serial data signal interface circuitry with multi-data-rate switching capability

SHIH SHOU-PO

Techniques for adjusting periodic signals based on data detection

INTEL CORP

Methods and apparatus for performing clock and data duty cycle correction in a high-speed link