Inventor

CHUDGAR KEYUR

US19 patents

⚠️ This page may combine multiple inventors who share the name “CHUDGAR KEYUR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHUDGAR KEYUR

CHUDGAR KEYUR

Packet forwarding system and method using patricia trie configured hardware

Stashing system and method for the prevention of cache thrashing

Method and system for queuing a request by a processor to access a shared resource and granting access in accordance with an embedded lock ID

Large receive offload functionality for a system on chip

Operating system with hardware-enabled task manager for offloading CPU task scheduling

Packet processing with dynamic load balancing

System-on-chip with power-save mode processor

System and method for packet splitting

System boot with external media

AMPERE COMPUTING LLC

Multiple-queue integer coalescing mapping algorithm with shared based time

Memory page request for optimizing memory page latency associated with network nodes

TCP segmentation offload in a server on a chip

Managing a data packet for an operating system associated with a multi-node system

Multiple-queue integer coalescing mapping algorithm with shared based time

Optimizing memory mapping(s) associated with network nodes

SATHE SATISH

System and method for partitioning resources in a system-on-chip (SoC)

System and method for pre-fetching data based on a FIFO queue of packet messages reaching a first capacity threshold

APPLIED MICRO CIRCUITS CORP

Flow pinning in a server on a chip

MARULKAR RAJENDRA SADANANAD

System and method for SATA virtualization and domain protection