P

Inventor

BLACK STEPHEN H

US34 patents
⚠️ This page may combine multiple inventors who share the name “BLACK STEPHEN H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAYTHEON CO

21 patents
US6885002B1Apr 26, 2005

IRFPA ROIC with dual TDM reset integrators and sub-frame averaging functions per unit cell

RAYTHEON CO33 citations91
US9570321B1Feb 14, 2017

Use of an external getter to reduce package pressure

RAYTHEON CO6 citations84
US6133596AOct 17, 2000

Near complete charge transfer device

RAYTHEON CO16 citations84
US9093444B2Jul 28, 2015

Wafer level package solder barrier used as vacuum getter

RAYTHEON CO4 citations83
US8736045B1May 27, 2014

Integrated bondline spacers for wafer level packaged circuit devices

RAYTHEON CO8 citations82
US8044355B2Oct 25, 2011

System and method for viewing an area using an optical system positioned inside of a dewar

RAYTHEON CO9 citations82
US6288387B1Sep 11, 2001

Apparatus and method for performing optical signal intensity correction in electro-optical sensor arrays

RAYTHEON CO12 citations72
US9227839B2Jan 5, 2016

Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling

RAYTHEON CO2 citations62
US9334154B2May 10, 2016

Hermetically sealed package having stress reducing layer

RAYTHEON CO2 citations60
US9865519B2Jan 9, 2018

Use of an external getter to reduce package pressure

RAYTHEON CO0 citations52
US10315918B2Jun 11, 2019

Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays

RAYTHEON CO0 citations51
US10262913B2Apr 16, 2019

Wafer level package solder barrier used as vacuum getter

RAYTHEON CO0 citations51
US9966320B2May 8, 2018

Wafer level package solder barrier used as vacuum getter

RAYTHEON CO0 citations51
US9520332B2Dec 13, 2016

Wafer level package solder barrier used as vacuum getter

RAYTHEON CO0 citations51
US9427776B2Aug 30, 2016

Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays

RAYTHEON CO1 citations51
US9196556B2Nov 24, 2015

Getter structure and method for forming such structure

RAYTHEON CO0 citations50
US9187312B2Nov 17, 2015

Integrated bondline spacers for wafer level packaged circuit devices

RAYTHEON CO0 citations50
US9174836B2Nov 3, 2015

Integrated bondline spacers for wafer level packaged circuit devices

RAYTHEON CO0 citations50
US9708181B2Jul 18, 2017

Hermetically sealed package having stress reducing layer

RAYTHEON CO0 citations49
US9407820B2Aug 2, 2016

Method and apparatus for inhibiting diversion of devices using an embedded accelerometer

RAYTHEON CO1 citations48
US9105800B2Aug 11, 2015

Method of forming deposited patterns on a surface

RAYTHEON CO0 citations39

BLACK STEPHEN H

5 patents

GEN ELECTRIC

1 patent

INDIGO SYSTEMS CORP

1 patent

GOOCH ROLAND W

1 patent

DIEP BUU

1 patent

GIBBONS ROBERT C

1 patent

CONTRAVES GOERZ CORP

1 patent

GRITZ MICHAEL A

1 patent

KUIKEN MATTHEW T

1 patent