Inventor

HUANG JUI-CHIEN

TW37 patents

⚠️ This page may combine multiple inventors who share the name “HUANG JUI-CHIEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG JUI-CHIEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Uniform gate width for nanostructure devices

Methods of fabricating a FinFET device with wrap-around silicide source/drain structure

Dual channel gate all around transistor device and fabrication methods thereof

Uniform gate width for nanostructure devices

Self-aligned metal gate for multigate device

FET with wrap-around silicide and fabrication methods thereof

FET with wrap-around silicide and fabrication methods thereof

Self-aligned metal gate for multigate device

Dual channel gate all around transistor device and fabrication methods thereof

Semiconductor structure and method of fabricating the semiconductor structure

Methods of forming silicide contact in field-effect transistors

FinFET devices and methods of forming the same

Dual epitaxial growth process for semiconductor device

Method of forming horizontal gate all around structure

Semiconductor device structure and methods of forming the same

Semiconductor structure and method of fabricating the semiconductor structure

Uniform gate width for nanostructure devices

Self-aligned metal gate for multigate device

Nano-sheet-based devices having inner spacer structures or gate portions with variable dimensions

Methods of forming silicide contact in field-effect transistors

Semiconductor structure and method of fabricating the semiconductor structure

Semiconductor device structure and methods of forming the same

Methods of forming silicide contact in field-effect transistors

Methods of forming nano-sheet-based devices having inner spacer structures with different widths

Methods of forming silicide contact in field-effect transistors

FET with wrap-around silicide and fabrication methods thereof

Methods of fabricating semiconductor devices having gate-all-around structure with inner spacer last process

Dual channel gate all around transistor device and fabrication methods thereof

FinFET devices and methods of forming the same

FinFET devices and methods of forming the same

Dual channel gate all around transistor device and fabrication methods thereof

Dual channel gate all around transistor device and fabrication methods thereof

Methods of fabricating semiconductor devices having gate-all-around structure with inner spacer last process

Curved wafer processing method and apparatus

Integrated circuit and system for fabricating the same

TAIWAN SEMICONDUCTOR MFG

Method of forming horizontal gate all around structure

CHANG I-MING

Curved wafer processing on method and apparatus