Inventor
RALEY ANGELIQUE
US43 patents
Patents
43 patentsUS10354873B2Jul 16, 2019
Organic mandrel protection process
TOKYO ELECTRON LTD340 citations98
US11101173B2Aug 24, 2021
Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same
TOKYO ELECTRON LTD11 citations94
US10916472B2Feb 9, 2021
Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same
TOKYO ELECTRON LTD14 citations94
US9673059B2Jun 6, 2017
Method for increasing pattern density in self-aligned patterning integration schemes
TOKYO ELECTRON LTD45 citations94
US10727057B2Jul 28, 2020
Platform and method of operating for integrated end-to-end self-aligned multi-patterning process
TOKYO ELECTRON LTD10 citations83
US11515203B2Nov 29, 2022
Selective deposition of conductive cap for fully-aligned-via (FAV)
TOKYO ELECTRON LTD2 citations72
US11322364B2May 3, 2022
Method of patterning a metal film with improved sidewall roughness
TOKYO ELECTRON LTD2 citations72
US11164781B2Nov 2, 2021
ALD (atomic layer deposition) liner for via profile control and related applications
TOKYO ELECTRON LTD2 citations72
US11915931B2Feb 27, 2024
Extreme ultraviolet lithography patterning method
TOKYO ELECTRON LTD2 citations71
US11482454B2Oct 25, 2022
Methods for forming self-aligned contacts using spin-on silicon carbide
TOKYO ELECTRON LTD2 citations71
US12469701B2Nov 11, 2025
Patterning features with metal based resists
TOKYO ELECTRON LTD0 citations62
US12100591B2Sep 24, 2024
Photoactive metal-based hard mask integration
TOKYO ELECTRON LTD0 citations62
US11424123B2Aug 23, 2022
Forming a semiconductor feature using atomic layer etch
TOKYO ELECTRON LTD1 citations62
US11398379B2Jul 26, 2022
Platform and method of operating for integrated end-to-end self-aligned multi-patterning process
TOKYO ELECTRON LTD0 citations62
US11127594B2Sep 21, 2021
Manufacturing methods for mandrel pull from spacers for multi-color patterning
TOKYO ELECTRON LTD0 citations62
US10867854B2Dec 15, 2020
Double plug method for tone inversion patterning
TOKYO ELECTRON LTD1 citations62
US12494369B2Dec 9, 2025
Extreme ultraviolet lithography patterning method
TOKYO ELECTRON LTD0 citations61
US12334391B2Jun 17, 2025
Method for patterning a substrate using photolithography
TOKYO ELECTRON LTD0 citations61
US12080599B2Sep 3, 2024
Methods for forming self-aligned contacts using spin-on silicon carbide
TOKYO ELECTRON LTD0 citations61
US11978631B2May 7, 2024
Forming contact holes with controlled local critical dimension uniformity
TOKYO ELECTRON LTD1 citations61
US11882776B2Jan 23, 2024
In-situ encapsulation of metal-insulator-metal (MIM) stacks for resistive random access memory (RERAM) cells
TOKYO ELECTRON LTD0 citations61
US11742241B2Aug 29, 2023
ALD (atomic layer deposition) liner for via profile control and related applications
TOKYO ELECTRON LTD0 citations61
US11495436B2Nov 8, 2022
Systems and methods to control critical dimension (CD) shrink ratio through radio frequency (RF) pulsing
TOKYO ELECTRON LTD0 citations61
US10748769B2Aug 18, 2020
Methods and systems for patterning of low aspect ratio stacks
TOKYO ELECTRON LTD1 citations60
US11658038B2May 23, 2023
Method for dry etching silicon carbide films for resist underlayer applications
TOKYO ELECTRON LTD0 citations59
US11289325B2Mar 29, 2022
Radiation of substrates during processing and systems thereof
TOKYO ELECTRON LTD0 citations59
US12009211B2Jun 11, 2024
Method for highly anisotropic etching of titanium oxide spacer using selective top-deposition
TOKYO ELECTRON LTD0 citations58
US11837471B2Dec 5, 2023
Methods of patterning small features
TOKYO ELECTRON LTD1 citations57
US12543517B2Feb 3, 2026
System and method for semiconductor structure
TOKYO ELECTRON LTD0 citations54
US12581921B2Mar 17, 2026
Multiple patterning with selective mandrel formation
TOKYO ELECTRON LTD0 citations51
US12322597B2Jun 3, 2025
Pitch scaling in microfabrication
TOKYO ELECTRON LTD0 citations51
US11721578B2Aug 8, 2023
Split ash processes for via formation to suppress damage to low-K layers
TOKYO ELECTRON LTD0 citations51
US11688604B2Jun 27, 2023
Method for using ultra thin ruthenium metal hard mask for etching profile control
TOKYO ELECTRON LTD0 citations51
US11621164B2Apr 4, 2023
Method for critical dimension (CD) trim of an organic pattern used for multi-patterning purposes
TOKYO ELECTRON LTD0 citations51
US11410852B2Aug 9, 2022
Protective layers and methods of formation during plasma etching processes
TOKYO ELECTRON LTD0 citations51
US12438006B2Oct 7, 2025
Metal hard mask integration
TOKYO ELECTRON LTD0 citations50
US11756790B2Sep 12, 2023
Method for patterning a dielectric layer
TOKYO ELECTRON LTD0 citations50
US10964587B2Mar 30, 2021
Atomic layer deposition for low-K trench protection during etch
TOKYO ELECTRON LTD0 citations50
US10950460B2Mar 16, 2021
Method utilizing using post etch pattern encapsulation
TOKYO ELECTRON LTD0 citations50
US12308250B2May 20, 2025
Pre-etch treatment for metal etch
TOKYO ELECTRON LTD0 citations47
US10049875B2Aug 14, 2018
Trim method for patterning during various stages of an integration scheme
TOKYO ELECTRON LTD0 citations42
US11227767B2Jan 18, 2022
Critical dimension trimming method designed to minimize line width roughness and line edge roughness
TOKYO ELECTRON LTD0 citations41
US10453686B2Oct 22, 2019
In-situ spacer reshaping for self-aligned multi-patterning methods and systems
TOKYO ELECTRON LTD0 citations41