Inventor
TRIVEDI VIVEK
US14 patents
⚠️ This page may combine multiple inventors who share the name “TRIVEDI VIVEK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ASTERA LABS INC
7 patentsUS11150687B1Oct 19, 2021
Low-latency retimer with seamless clock switchover
ASTERA LABS INC7 citations82
US11487317B1Nov 1, 2022
Low-latency retimer with seamless clock switchover
ASTERA LABS INC3 citations71
US11258696B1Feb 22, 2022
Low-latency signaling-link retimer
ASTERA LABS INC3 citations71
US12277002B1Apr 15, 2025
Low-latency retimer with seamless clock switchover
ASTERA LABS INC0 citations61
US12143288B1Nov 12, 2024
Low-latency signaling-link retimer
ASTERA LABS INC0 citations61
US11853115B1Dec 26, 2023
Low-latency retimer with seamless clock switchover
ASTERA LABS INC0 citations61
US11327913B1May 10, 2022
Configurable-aggregation retimer with media-dedicated controllers
ASTERA LABS INC0 citations61
XPLIANT INC
3 patentsUS9443053B2Sep 13, 2016
System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks
XPLIANT INC7 citations78
US9390209B2Jul 12, 2016
System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks
XPLIANT INC0 citations35
US9305129B2Apr 5, 2016
System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells
XPLIANT INC0 citations35