Inventor
RAZ SHIRAN
IL5 patents
Patents
5 patentsUS10831958B2Nov 10, 2020
Integrated circuit design with optimized timing constraint configuration
IBM3 citations68
US10657211B2May 19, 2020
Circuit generation based on zero wire load assertions
IBM1 citations57
US10572613B2Feb 25, 2020
Estimating timing convergence using assertion comparisons
IBM1 citations57
US10325045B2Jun 18, 2019
Estimating timing convergence using assertion comparisons
IBM0 citations47
US10568203B2Feb 18, 2020
Modifying a circuit design
IBM0 citations33