P

Inventor

QUERBACH BRUCE

US28 patents
⚠️ This page may combine multiple inventors who share the name “QUERBACH BRUCE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

26 patents
US7139957B2Nov 21, 2006

Automatic self test of an integrated circuit component via AC I/O loopback

INTEL CORP27 citations90
US6826100B2Nov 30, 2004

Push button mode automatic pattern switching for interconnect built-in self test

INTEL CORP31 citations90
US9818457B1Nov 14, 2017

Extended platform with additional memory module slots per CPU socket

INTEL CORP12 citations84
US10014036B1Jul 3, 2018

Low power and area efficient memory receiver

INTEL CORP12 citations83
US9977075B1May 22, 2018

Integrated circuit reliability assessment apparatus and method

INTEL CORP10 citations80
US10216657B2Feb 26, 2019

Extended platform with additional memory module slots per CPU socket and configured for increased performance

INTEL CORP2 citations73
US9659626B1May 23, 2017

Memory refresh operation with page open

INTEL CORP4 citations73
US10163508B2Dec 25, 2018

Supporting multiple memory types in a memory slot

INTEL CORP5 citations72
US10163502B2Dec 25, 2018

Selective performance level modes of operation in a non-volatile memory

INTEL CORP2 citations70
US9922725B2Mar 20, 2018

Integrated circuit defect detection and repair

INTEL CORP2 citations70
US9548137B2Jan 17, 2017

Integrated circuit defect detection and repair

INTEL CORP4 citations70
US9691492B1Jun 27, 2017

Determination of demarcation voltage for managing drift in non-volatile memory devices

INTEL CORP5 citations69
US7228515B2Jun 5, 2007

Methods and apparatuses for validating AC I/O loopback tests using delay modeling in RTL simulation

INTEL CORP9 citations67
US11620358B2Apr 4, 2023

Technologies for performing macro operations in memory

INTEL CORP0 citations62
US11182158B2Nov 23, 2021

Technologies for providing adaptive memory media management

INTEL CORP0 citations62
US11264094B2Mar 1, 2022

Memory cell including multi-level sensing

INTEL CORP0 citations59
US11074151B2Jul 27, 2021

Processor having embedded non-volatile random access memory to support processor monitoring software

INTEL CORP0 citations59
US7501863B2Mar 10, 2009

Voltage margining with a low power, high speed, input offset cancelling equalizer

INTEL CORP5 citations58
US10599592B2Mar 24, 2020

Extended platform with additional memory module slots per CPU socket and configured for increased performance

INTEL CORP0 citations52
US10242717B2Mar 26, 2019

Extended platform with additional memory module slots per CPU socket

INTEL CORP0 citations52
US9953694B2Apr 24, 2018

Memory controller-controlled refresh abort

INTEL CORP1 citations52
US7480360B2Jan 20, 2009

Regulating a timing between a strobe signal and a data signal

INTEL CORP4 citations52
US9824743B2Nov 21, 2017

Memory refresh operation with page open

INTEL CORP0 citations51
US10878100B2Dec 29, 2020

Secure boot processor with embedded NVRAM

INTEL CORP0 citations49
US9564245B2Feb 7, 2017

Integrated circuit defect detection and repair

INTEL CORP1 citations47
US10691466B2Jun 23, 2020

Booting a computing system using embedded non-volatile memory

INTEL CORP0 citations38

SPRY BRYAN L

1 patent

TROBOUGH MARK B

1 patent