Inventor
BULAGA RAYMOND J
US3 patents
Patents
3 patentsUS6618682B2Sep 9, 2003
Method for test optimization using historical and actual fabrication test data
IBM88 citations95
US6229465B1May 8, 2001
Built in self test method and structure for analog to digital converter
IBM27 citations88
US6549150B1Apr 15, 2003
Integrated test structure and method for verification of microelectronic devices
IBM16 citations77