Inventor
SUBRAHMANYAM CHIVUKULA
SG7 patents
Patents
7 patentsUS6337262B1Jan 8, 2002
Self aligned T-top gate process integration
CHARTERED SEMICONDUCTOR MFG90 citations96
US6399448B1Jun 4, 2002
Method for forming dual gate oxide
CHARTERED SEMICONDUCTOR MFG67 citations95
US6284613B1Sep 4, 2001
Method for forming a T-gate for better salicidation
CHARTERED SEMICONDUCTOR MFG61 citations94
US6248006B1Jun 19, 2001
CMP uniformity
CHARTERED SEMICONDUCTOR MFG27 citations91
US5747369AMay 5, 1998
Formation of a capacitor using a sacrificial etch stop
CHARTERED SEMICONDUCTOR MFG26 citations90
US6689653B1Feb 10, 2004
Method of preserving the top oxide of an ONO dielectric layer via use of a capping material
CHARTERED SEMICONDUCTOR MFG43 citations87
US6726545B2Apr 27, 2004
Linear polishing for improving substrate uniformity
CHARTERED SEMICONDUCTOR MFG4 citations59