Inventor
CHIU YUAN-HUNG
TW40 patents
⚠️ This page may combine multiple inventors who share the name “CHIU YUAN-HUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
31 patentsUS6407002B1Jun 18, 2002
Partial resist free approach in contact etch to improve W-filling
TAIWAN SEMICONDUCTOR MFG83 citations98
US6869868B2Mar 22, 2005
Method of fabricating a MOSFET device with metal containing gate structures
TAIWAN SEMICONDUCTOR MFG134 citations97
US7078351B2Jul 18, 2006
Photoresist intensive patterning and processing
TAIWAN SEMICONDUCTOR MFG44 citations93
US6297162B1Oct 2, 2001
Method to reduce silicon oxynitride etch rate in a silicon oxide dry etch
TAIWAN SEMICONDUCTOR MFG67 citations93
US7012027B2Mar 14, 2006
Zirconium oxide and hafnium oxide etching using halogen containing chemicals
TAIWAN SEMICONDUCTOR MFG44 citations92
US6867084B1Mar 15, 2005
Gate structure and method of forming the gate dielectric with mini-spacer
TAIWAN SEMICONDUCTOR MFG31 citations92
US6818553B1Nov 16, 2004
Etching process for high-k gate dielectrics
TAIWAN SEMICONDUCTOR MFG27 citations92
US6764903B1Jul 20, 2004
Dual hard mask layer patterning method
TAIWAN SEMICONDUCTOR MFG32 citations92
US6884736B2Apr 26, 2005
Method of forming contact plug on silicide structure
TAIWAN SEMICONDUCTOR MFG20 citations91
US6235653B1May 22, 2001
Ar-based si-rich oxynitride film for dual damascene and/or contact etch stop layer
TAIWAN SEMICONDUCTOR MFG24 citations91
US7195969B2Mar 27, 2007
Strained channel CMOS device with fully silicided gate electrode
TAIWAN SEMICONDUCTOR MFG23 citations90
US8900960B2Dec 2, 2014
Integrated circuit device with well controlled surface proximity and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG6 citations84
US7074727B2Jul 11, 2006
Process for improving dielectric properties in low-k organosilicate dielectric material
TAIWAN SEMICONDUCTOR MFG17 citations84
US7008878B2Mar 7, 2006
Plasma treatment and etching process for ultra-thin dielectric films
TAIWAN SEMICONDUCTOR MFG18 citations84
US6524938B1Feb 25, 2003
Method for gate formation with improved spacer profile control
TAIWAN SEMICONDUCTOR MFG19 citations84
US6503848B1Jan 7, 2003
Method of forming a smooth polysilicon surface using a soft etch to enlarge the photo lithography window
TAIWAN SEMICONDUCTOR MFG15 citations84
US7301645B2Nov 27, 2007
In-situ critical dimension measurement
TAIWAN SEMICONDUCTOR MFG14 citations83
US7390753B2Jun 24, 2008
In-situ plasma treatment of advanced resists in fine pattern definition
TAIWAN SEMICONDUCTOR MFG9 citations82
US6849531B1Feb 1, 2005
Phosphoric acid free process for polysilicon gate definition
TAIWAN SEMICONDUCTOR MFG15 citations82
US6777340B1Aug 17, 2004
Method of etching a silicon containing layer using multilayer masks
TAIWAN SEMICONDUCTOR MFG17 citations82
US7109085B2Sep 19, 2006
Etching process to avoid polysilicon notching
TAIWAN SEMICONDUCTOR MFG10 citations74
US6812044B2Nov 2, 2004
Advanced control for plasma process
TAIWAN SEMICONDUCTOR MFG7 citations74
US6828237B1Dec 7, 2004
Sidewall polymer deposition method for forming a patterned microelectronic layer
TAIWAN SEMICONDUCTOR MFG8 citations72
US6333271B1Dec 25, 2001
Multi-step plasma etch method for plasma etch processing a microelectronic layer
TAIWAN SEMICONDUCTOR MFG14 citations72
US7060628B2Jun 13, 2006
Method for fabricating a hard mask polysilicon gate
TAIWAN SEMICONDUCTOR MFG2 citations63
US6900104B1May 31, 2005
Method of forming offset spacer manufacturing for critical dimension precision
TAIWAN SEMICONDUCTOR MFG6 citations63
US6828198B2Dec 7, 2004
System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process
TAIWAN SEMICONDUCTOR MFG4 citations62
US9349831B2May 24, 2016
Integrated circuit device with well controlled surface proximity and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG0 citations52
US7510940B2Mar 31, 2009
Method for fabricating dual-gate semiconductor device
TAIWAN SEMICONDUCTOR MFG0 citations52
US7678655B2Mar 16, 2010
Spacer layer etch method providing enhanced microelectronic device performance
TAIWAN SEMICONDUCTOR MFG1 citations51
US7307009B2Dec 11, 2007
Phosphoric acid free process for polysilicon gate definition
TAIWAN SEMICONDUCTOR MFG0 citations50
TAIWAN SEMICONDUCTOR MFG CO LTD
7 patentsUS9627258B1Apr 18, 2017
Method of forming a contact
TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84
US10861960B1Dec 8, 2020
FinFET device and method
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations81
US10164032B2Dec 25, 2018
Self-aligned contact and manufacturing method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations73
US10032887B2Jul 24, 2018
Method of forming a contact
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US11437498B2Sep 6, 2022
FinFET device and method
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations70
US11735651B2Aug 22, 2023
FinFET device and method
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US10825907B2Nov 3, 2020
Self-aligned contact and manufacturing method thereof
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52