Inventor

LIN SHY-JAY

TW127 patents

⚠️ This page may combine multiple inventors who share the name “LIN SHY-JAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN SHY-JAY

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor structure and associated operating and fabricating method

MRAM device and method for fabricating the same

Method of fabricating an integrated circuit with non-printable dummy features

Semiconductor MRAM device and method

Memory device and memory circuit

SOT-MRAM with shared selector

Memory device, semiconductor device, and method of fabricating semiconductor device

Systems and methods for high-throughput and small-footprint scanning exposure for lithography

Reference circuit and MRAM

Method of fabricating an integrated circuit with optimized pattern density uniformity

Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity

Semiconductor device and method for forming the same

Semiconductor device and method for forming the same

Memory device

Magnetic tunneling junction with synthetic free layer for SOT-MRAM

Magnetic device and magnetic random access memory

MRAM stacks, MRAM devices and methods of forming the same

Magnetic device and magnetic random access memory

Magnetic tunnel junction structures and related methods

Method of fabricating an integrated circuit with non-printable dummy features

Magnetic device and magnetic random access memory

Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity

Semiconductor device with asymmetrical pinned magnets, and method of manufacture

Semiconductor structure and associated operating and fabricating method

Magnetic random access memory and manufacturing method thereof

Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity

Method of fabricating an integrated circuit with non-printable dummy features

Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity

Electron beam lithography process with multiple columns

Magnetic tunneling junction with synthetic free layer for SOT-MRAM

TAIWAN SEMICONDUCTOR MFG

Grid refinement method

Electron beam lithography system and method for improving throughput

Multiple-grid exposure method

Method of making a semiconductor wafer imaging mask having uniform pattern features

Apparatus and method of inspecting phase shift masks using comparison of a mask die image to the mask image database

Double layer method for fabricating a rim type attenuating phase shifting mask

Method for electron beam proximity correction with improved critical dimension accuracy

Grid refinement method

System and method for direct writing to a wafer

Phase-shift mask for printing high-resolution images and a method of fabrication

Apparatus and method for inspecting phase shifting masks

SHIN JAW-JUNG

Method for proximity correction

Electron beam lithography system and method for improving throughput

Liu pei-yi

Non-directional dithering methods

Error diffusion and grid shift in lithography

PENG JUI-CHUNG

System and method for improving immersion scanner overlay performance

System and method for improving immersion scanner overlay performance

YU CHEN-HUA

Devices and methods for improved reflective electron beam lithography

WANG WEN CHUAN

Multiple-grid exposure method

WANG HUNG-CHUN

Providing electron beam proximity effect correction by simulating write operations of polygonal shapes