Inventor

ANAND VISHAL

US51 patents

⚠️ This page may combine multiple inventors who share the name “ANAND VISHAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ANAND VISHAL

IBM

Storage device optimization

Multiple parameter based composite rule wise data validation in cloud hybrid model

Disk utilization analysis

Management and development of modifications within a source code

Server virtualization

Disk utilization analysis

Disk utilization analysis

Storage device optimization

Server virtualization

Server virtualization

Disk utilization analysis

Container cross-cluster capacity scaling

Self orchestrated containers for cloud computing

Modular decomposition and composition of container software management clusters in hybrid cloud

CAVIUM INC

Method of dynamically renumbering ports and an apparatus thereof

Apparatus and a method of detecting errors on registers

Method of reducing latency in a flexible parser and an apparatus thereof

Method of extracting data from packets and an apparatus thereof

Method of handling large protocol layers for configurable extraction of layer information and an apparatus thereof

Method of implementing a network ASIC in a network device

Method of identifying internal destinations of network packets and an apparatus thereof

Two modes of a configuration interface of a network ASIC

Method of modifying packets to a generic format for enabling programmable modifications and an apparatus thereof

Method of identifying internal destinations of networks packets and an apparatus thereof

Smart holding registers to enable multiple register accesses

Method of representing a generic format header using continuous bytes and an apparatus thereof

Method of dynamically renumbering ports and an apparatus thereof

VLSI TECHNOLOGY INC

Single address queue for handling multiple priority requests

Centrally controlled interface scheme for promoting design reusable circuit blocks

Optimized CPU-memory high bandwidth multibus structure simultaneously supporting design reusable blocks

Interface and process for handling out-of-order data transactions and synchronizing events in a split-bus system

Single address queue for handling multiple priority requests

Method and system for latching an address for accessing synchronous random access memory using a single address status signal control line

KYNDRYL INC

Chaos experiment execution for site reliability engineering

Multi-cluster container orchestration

Container scheduler with multiple queues for special workloads

Multiple parameter based composite rule data validation

ANAND VISHAL

Server virtualization

Facade for business risk minimization in change administration via risk estimation and mistake identification by ticket analysis

Automatic documentation of ticket execution

MASTERCARD INTERNATIONAL INC

Systems and methods for distributed peer to peer analytics

Systems and methods for distributed peer to peer analytics

VSLI TECHNOLOGY INC

Method of and system for allowing a computer system to access cacheable memory in a non-cacheable manner

KONINKL PHILIPS ELECTRONICS NV

High performance internal bus for promoting design reuse in north bridge chips

GURUNATHAN RANGANATHAN

Fuel cell control system

RES FOUNDATION SUNY

Efficient optical network design using multi-granular optical cross-connects with wavelength band switching

CAVIUM LLC

Method of handling large protocol layers for configurable extraction of layer information and an apparatus thereof

INTEL CORP

Technologies for network application programming with field-programmable gate arrays

MICROSOFT TECHNOLOGY LICENSING LLC

Building and using target-based sentiment models

XPLIANT INC

Method of forming a hash input from packet contents and an apparatus thereof