Inventor
FLEMING BRUCE L
US21 patents
⚠️ This page may combine multiple inventors who share the name “FLEMING BRUCE L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
12 patentsUS7774626B2Aug 10, 2010
Method to control core duty cycles using low power modes
INTEL CORP23 citations92
US6249739B1Jun 19, 2001
Operating vehicular processor-based systems
INTEL CORP13 citations72
US9916876B2Mar 13, 2018
Ultra low power architecture to support always on path to memory
INTEL CORP6 citations71
US9665155B2May 30, 2017
Techniques for increasing energy efficiency of sensor controllers that receive data from one or more sensors
INTEL CORP2 citations71
US6622244B1Sep 16, 2003
Booting from a reprogrammable memory on an unconfigured bus by modifying boot device address
INTEL CORP12 citations69
US8959531B2Feb 17, 2015
Coordinating device and application break events for platform power saving
INTEL CORP1 citations62
US8380908B2Feb 19, 2013
Emulation of an input/output advanced programmable interrupt controller
INTEL CORP2 citations62
US8352770B2Jan 8, 2013
Method, system and apparatus for low-power storage of processor context information
INTEL CORP3 citations62
US10282344B2May 7, 2019
Sensor bus interface for electronic devices
INTEL CORP1 citations61
US7249253B2Jul 24, 2007
Booting from a re-programmable memory on an unconfigured bus
INTEL CORP4 citations58
US8719612B2May 6, 2014
Method, system and apparatus for low-power storage of processor context information
INTEL CORP0 citations51
US9665522B2May 30, 2017
Protocol neutral fabric
INTEL CORP0 citations49
WANG REN
3 patentsUS8612998B2Dec 17, 2013
Coordinating device and application break events for platform power saving
WANG REN6 citations84
US10133336B2Nov 20, 2018
Dynamically entering low power states during active workloads
WANG REN2 citations72
US9513964B2Dec 6, 2016
Coordinating device and application break events for platform power saving
WANG REN0 citations52
MURALIDHAR RAJEEV D
2 patentsUS8775836B2Jul 8, 2014
Method, apparatus and system to save processor state for efficient transition between processor power states
MURALIDHAR RAJEEV D5 citations82
US8601304B2Dec 3, 2013
Method, apparatus and system to transition system power state of a computer platform
MURALIDHAR RAJEEV D1 citations50