Inventor
MUNASINGHE CHANAKA D
US14 patents
⚠️ This page may combine multiple inventors who share the name “MUNASINGHE CHANAKA D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
10 patentsUS10056380B2Aug 21, 2018
Non-planar semiconductor device having doped sub-fin region and method to fabricate same
INTEL CORP15 citations91
US10964697B2Mar 30, 2021
Non-planar semiconductor device having doped sub-fin region and method to fabricate same
INTEL CORP2 citations71
US10622359B2Apr 14, 2020
Non-planar semiconductor device having doped sub-fin region and method to fabricate same
INTEL CORP1 citations71
US12471349B2Nov 11, 2025
Contact over active gate structures with uniform and conformal gate insulating cap layers for advanced integrated circuit structure fabrication
INTEL CORP0 citations59
US12543558B2Feb 3, 2026
Self-aligned interconnect features for transistor contacts
INTEL CORP0 citations52
US10854607B2Dec 1, 2020
Isolation well doping with solid-state diffusion sources for finFET architectures
INTEL CORP0 citations51
US10643999B2May 5, 2020
Doping with solid-state diffusion sources for finFET architectures
INTEL CORP0 citations51
US10340273B2Jul 2, 2019
Doping with solid-state diffusion sources for finFET architectures
INTEL CORP0 citations51
US10396079B2Aug 27, 2019
Non-planar semiconductor device having doped sub-fin region and method to fabricate same
INTEL CORP0 citations50
US12484281B2Nov 25, 2025
Topside plugs for epitaxial contact formation
INTEL CORP0 citations47