Inventor
DERDERIAN GARO JACQUES
US10 patents
Patents
10 patentsUS10475791B1Nov 12, 2019
Transistor fins with different thickness gate dielectric
GLOBALFOUNDRIES INC12 citations84
US9761452B1Sep 12, 2017
Devices and methods of forming SADP on SRAM and SAQP on logic
GLOBALFOUNDRIES INC7 citations83
US9385124B1Jul 5, 2016
Methods of forming reduced thickness spacers in CMOS based integrated circuit products
GLOBALFOUNDRIES INC19 citations83
US10586736B2Mar 10, 2020
Hybrid fin cut with improved fin profiles
GLOBALFOUNDRIES INC4 citations73
US10418272B1Sep 17, 2019
Methods, apparatus, and system for a semiconductor device comprising gates with short heights
GLOBALFOUNDRIES INC4 citations73
US10832967B2Nov 10, 2020
Tapered fin-type field-effect transistors
GLOBALFOUNDRIES INC4 citations72
US9754792B1Sep 5, 2017
Fin cutting process for manufacturing FinFET semiconductor devices
GLOBALFOUNDRIES INC2 citations71
US9704759B2Jul 11, 2017
Methods of forming CMOS based integrated circuit products using disposable spacers
GLOBALFOUNDRIES INC1 citations51
US9318440B2Apr 19, 2016
Formation of carbon-rich contact liner material
GLOBALFOUNDRIES INC1 citations49
US9130019B2Sep 8, 2015
Formation of carbon-rich contact liner material
GLOBALFOUNDRIES INC1 citations49