Inventor

RAAD GEORGE B

US91 patents

⚠️ This page may combine multiple inventors who share the name “RAAD GEORGE B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAAD GEORGE B

MICRON TECHNOLOGY INC

Circuit, system and method for selectively turning off internal clock drivers

Methods for independent memory bank maintenance and memory devices and systems employing the same

Ram row decode circuitry that utilizes a precharge circuit that is deactivated by a feedback from an activated word line driver

Self-test RAM using external synchronous clock

Self-test ram using external synchronous clock

Self-test RAM using external synchronous clock

Method and memory device for dynamic cell plate sensing with ac equilibrate

Power-up circuit responsive to supply voltage transients with signal delay

DRAM power bus control

Self-test ram using external synchronous clock

Dynamic random access memory array having segmented digit lines

Variable voltage isolation gate and method

Low voltage level power-up detection circuit

Methods of operating a dynamic random access memory

Enbedded memory assembly

Device and method for stress testing a semiconduction memory

Method and circuit for sharing sense amplifier drivers

Device and method for stress testing a semiconductor memory

Power-up circuit responsive to supply voltage transients

Local word line phase driver

Non-volatile memory devices and systems with volatile memory features and methods for operating the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Sensing techniques using charge transfer device

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for detecting and mitigating memory media degradation and memory devices employing the same

Non-volatile memory devices and systems with read-only memory features and methods for operating the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Apparatuses and methods for reducing cycle times in successive memory accesses

Circuit and method for varying a pulse width of an internal control signal during a test mode

Method and apparatus for reducing current drain caused by row to column shorts in a memory device

Equilibration/pre-charge circuit for a memory device

Method and memory device for dynamic cell plate sensing with AC equilibrate

Variable voltage isolation gate and method

Memory architecture and decoder addressing

Local word line phase driver

DRAM power bus control

DRAM power bus control

DRAM power bus control

Memory architecture and decoder addressing

Memory architecture and decoder addressing

Method and memory device for dynamic cell plate sensing with AC equilibrate

Memory architecture and decoder addressing

Memory array architecture and method for dynamic cell plate sensing

Fast sense amplifier for small voltage differences

Embedded memory assembly

MICRON SEMICONDUCTOR INC

RAM row decode circuitry that utilizes a precharge circuit that is deactivated by a feedback from an activated word line driver