Inventor
SINGH RUPESH
IN20 patents
⚠️ This page may combine multiple inventors who share the name “SINGH RUPESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ST MICROELECTRONICS INT NV
19 patentsUS10050640B1Aug 14, 2018
High speed data weighted averaging architecture
ST MICROELECTRONICS INT NV7 citations83
US11656848B2May 23, 2023
High throughput parallel architecture for recursive sinusoid synthesizer
ST MICROELECTRONICS INT NV2 citations72
US11043960B2Jun 22, 2021
Sigma-delta analog-to-digital converter circuit with correction for mismatch error introduced by the feedback digital-to-analog converter
ST MICROELECTRONICS INT NV3 citations72
US10862503B2Dec 8, 2020
Clock jitter measurement using signal-to-noise ratio degradation in a continuous time delta-sigma modulator
ST MICROELECTRONICS INT NV2 citations72
US10218380B1Feb 26, 2019
High speed data weighted averaging architecture
ST MICROELECTRONICS INT NV6 citations72
US10211850B1Feb 19, 2019
High speed data weighted averaging architecture
ST MICROELECTRONICS INT NV2 citations72
US12449478B2Oct 21, 2025
Low overhead loop back test for high speed transmitter
ST MICROELECTRONICS INT NV1 citations63
US12093193B2Sep 17, 2024
High throughput digital filter architecture for processing unary coded data
ST MICROELECTRONICS INT NV0 citations62
US12086568B2Sep 10, 2024
High throughput parallel architecture for recursive sinusoid synthesizer
ST MICROELECTRONICS INT NV0 citations62
US11989148B2May 21, 2024
Data bridge for interfacing source synchronous datapaths with unknown clock phases
ST MICROELECTRONICS INT NV0 citations62
US11563443B2Jan 24, 2023
High speed data weighted averaging (DWA) to binary converter circuit
ST MICROELECTRONICS INT NV0 citations62
US11092993B2Aug 17, 2021
Digital sinusoid generator
ST MICROELECTRONICS INT NV0 citations62
US11417371B2Aug 16, 2022
First order memory-less dynamic element matching technique
ST MICROELECTRONICS INT NV0 citations61
US11094354B2Aug 17, 2021
First order memory-less dynamic element matching technique
ST MICROELECTRONICS INT NV1 citations61
US11463098B2Oct 4, 2022
Method and device for testing successive approximation register analog-to-digital converters
ST MICROELECTRONICS INT NV0 citations60
US12463650B2Nov 4, 2025
Control of skew between multiple data lanes
ST MICROELECTRONICS INT NV0 citations51
US12436853B2Oct 7, 2025
Method and architecture for serial link characterization by arbitrary size pattern generator
ST MICROELECTRONICS INT NV0 citations51
US11411565B2Aug 9, 2022
Clock and data recovery circuit
ST MICROELECTRONICS INT NV0 citations51
US10484165B2Nov 19, 2019
Latency buffer circuit with adaptable time shift
ST MICROELECTRONICS INT NV0 citations51