Inventor

CHOU CHIA CHENG

TW45 patents

⚠️ This page may combine multiple inventors who share the name “CHOU CHIA CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOU CHIA CHENG

TAIWAN SEMICONDUCTOR MFG CO LTD

Low-K dielectric interconnect systems

Interconnect structure and method

Multi-patterning to form vias with straight profiles

Interconnect structure and method

Damascene process using cap layer

Reducing oxidation by etching sacrificial and protection layer separately

Multi-patterning to form vias with straight profiles

Interconnect structure and method

Low-k dielectric interconnect systems

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Low-k dielectric and processes for forming same

Interconnect structures of semiconductor device and methods of forming the same

Interconnect structures of semiconductor device and methods of forming the same

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Methods of forming interconnect structures of semiconductor device

Interconnect structure and method

Low-k dielectric and processes for forming same

Low-k dielectric and processes for forming same

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Multi-patterning to form vias with straight profiles

Method of making interconnect structure

Automatically adjusting baking process for low-k dielectric material

Method for forming semiconductor device structure

TAIWAN SEMICONDUCTOR MFG

Method for forming self-assembled mono-layer liner for Cu/porous low-k interconnections

Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio

Method of making interconnect structure

Semiconductor device

Interconnect structures with surfaces roughness improving liner and methods for fabricating the same

Repairing method for low-k dielectric materials

Method of forming a low-k dielectric layer with improved damage resistance and chemical integrity

Method of and apparatus for active energy assist baking

Surface treatment in the formation of interconnect structure

Method for fabricating low-k dielectric and Cu interconnect

Method for fabricating low-k dielectric and Cu interconnect

Interconnect structure and method for forming the same

Interconnect structure and method for forming the same

KO CHUNG-CHI

Method for forming self-assembled mono-layer liner for cu/porous low-k interconnections

Method of and apparatus for active energy assist baking

Low-k interconnect structures with reduced RC delay

CHI HUA FITNESS CO LTD

Brake controller for spinner bike

SHIH PO-CHENG

Interconnect structure and method for forming the same

LIOU JOUNG-WEI

Method of modifying a low k dielectric layer having etched features and the resulting product

SINGTEX IND CO LTD

Woven brushed elastic fabric and method of making the same

CHOU CHIA-CHENG

Automatically adjusting baking process for low-k dielectric material

KO CHUNG CHI

Forming interconnect structure using plasma treated metal hard mask