Inventor

SHIH PO-CHENG

TW46 patents

⚠️ This page may combine multiple inventors who share the name “SHIH PO-CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIH PO-CHENG

TAIWAN SEMICONDUCTOR MFG CO LTD

Low-K dielectric interconnect systems

Interconnect structure and method

Multi-layer film device and method

Multi-layer film device and method

Interconnect structure and method

Multi-layer film device and method

Methods for reducing dual damascene distortion

Patterning interconnects and other structures by photo-sensitizing method

Patterning interconnects and other structures by photo-sensitizing method

Semiconductor device with multi-layer etch stop structure and method for forming the same

Interconnect structure and method

Low-k dielectric interconnect systems

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Methods for reducing dual damascene distortion

Methods for reducing dual damascene distortion

Dielectric layers having nitrogen-containing crusted surfaces

Low-k dielectric and processes for forming same

Patterning interconnects and other structures by photo-sensitizing method

Semiconductor devices and methods

Semiconductor device with multi-layer etch stop structure

Multi-layer film device and method

Method for forming semiconductor device with multi-layer etch stop structure

Multi-layer film device and method

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Interconnect structure and method

Low-k dielectric and processes for forming same

Low-k dielectric and processes for forming same

Semiconductor device having an extra low-k dielectric layer and method of forming the same

Dummy hybrid film for self-alignment contact formation

Methods for reducing dual damascene distortion

Methods for reducing dual damascene distortion

Method of making interconnect structure

Method for forming semiconductor device structure

High UV curing efficiency for low-k dielectrics

Hybrid film scheme for self-aligned contact

TAIWAN SEMICONDUCTOR MFG

Method of making interconnect structure

Surface treatment in the formation of interconnect structure

Interconnect structure and method for forming the same

Method of forming semiconductor device using remote plasma treatment

Interconnect structure and method for forming the same

SHIH PO-CHENG

Double patterning strategy for contact hole and trench in photolithography

Methods for forming interconnect structures of integrated circuits

Interconnect structure and method for forming the same

Interconnect structure and method for forming the same

AU OPTRONICS CORP

Common voltage adjustment circuit and liquid crystal display panel utilizing the same

WANG KUAN-CHEN

Low-k Cu barriers in damascene interconnect structures