Inventor

MCDONALD THOMAS C

US36 patents

⚠️ This page may combine multiple inventors who share the name “MCDONALD THOMAS C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MCDONALD THOMAS C

IP FIRST LLC

Speculative hybrid branch direction predictor

Method and apparatus for correcting an internal call/return stack in a microprocessor that speculatively executes call and return instructions

Apparatus and method for handling BTAC branches that wrap across instruction cache lines

Speculative branch target address cache with selective override by secondary predictor based on branch instruction type

Processor including fallback branch prediction mechanism for far jump and far call instructions

Apparatus and method for target address replacement in speculative branch target address cache

Apparatus and method for selectively accessing disparate instruction buffer stages based on branch target address cache hit and instruction stage wrap

Apparatus and method for target address replacement in speculative branch target address cache

Apparatus and method for speculatively performing a return instruction in a microprocessor

Microprocessor that detects erroneous speculative prediction of branch instruction opcode byte

Method and apparatus for correcting an internal call/return stack in a microprocessor that detects from multiple pipeline stages incorrect speculative update of the call/return stack

Apparatus and method for densely packing a branch instruction predicted by a branch target address cache and associated target instructions into a byte-wide instruction buffer

Apparatus and method for selectively overriding return stack prediction in response to detection of non-standard return sequence

Apparatus and method for handling BTAC branches that wrap across instruction cache lines

Selecting next instruction line buffer stage based on current instruction line boundary wraparound and branch target in buffer indicator

CENTAUR TECH INC

Adjustable write policies controlled by feature control registers

Spectre fixes with predictor mode tag

Branch density detection for prefetcher

Dual branch execute and table update with single port

Dual branch format

Side cache array for greater fetch bandwidth

Speculative branch pattern update

Spectre fixes with indirect valid table

Quick predictor override and update by a BTAC

Small branch predictor escape

MCDONALD THOMAS C

Garden hose water meter

Efficient branch target address cache entry replacement

Out-of-order microprocessor with separate branch information circular queue table tagged by branch instructions in reorder buffer to reduce unnecessary space in buffer

Prefix accumulation for efficient processing of instructions with multiple prefix bytes

Apparatus and method for marking start and end bytes of instructions in a stream of instruction bytes in a microprocessor having an instruction set architecture in which instructions may include a length-modifying prefix

Bad branch prediction detection, marking, and accumulation for faster instruction stream processing

Instruction extraction through prefix accumulation

Early release of cache data with start/end marks when instructions are only partially present

VIA TECH INC

Variable group associativity branch target address cache delivering multiple target addresses per cache line

GRINDMASTER CORP

Chilled beverage dispenser with cradle evaporator

DUNCAN JOHN L

Apparatus for efficiently determining instruction length instruction within a stream of x86 instruction bytes