P

Inventor

LE VAN

US34 patents
⚠️ This page may combine multiple inventors who share the name “LE VAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

30 patents
US11171243B2Nov 9, 2021

Transistor structures with a metal oxide contact buffer

INTEL CORP11 citations85
US11320883B2May 3, 2022

Multi-die stacks with power management

INTEL CORP6 citations84
US11094672B2Aug 17, 2021

Composite IC chips including a chiplet embedded within metallization layers of a host IC chip

INTEL CORP5 citations84
US9666492B2May 30, 2017

CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture

INTEL CORP6 citations84
US8872225B2Oct 28, 2014

Defect transferred and lattice mismatched epitaxial film

INTEL CORP12 citations84
US9029835B2May 12, 2015

Epitaxial film on nanoscale structure

INTEL CORP13 citations82
US11843058B2Dec 12, 2023

Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures

INTEL CORP3 citations73
US11257956B2Feb 22, 2022

Thin film transistor with selectively doped oxide thin film

INTEL CORP2 citations73
US11017843B2May 25, 2021

Thin film transistors for memory cell array layer selection

INTEL CORP3 citations73
US11011550B2May 18, 2021

Self-aligned top-gated non-planar oxide semiconductor thin film transistors

INTEL CORP2 citations73
US10784170B2Sep 22, 2020

CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture

INTEL CORP3 citations73
US10565138B2Feb 18, 2020

Memory device with multiple memory arrays to facilitate in-memory computation

INTEL CORP3 citations73
US10319646B2Jun 11, 2019

CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture

INTEL CORP3 citations73
US11205630B2Dec 21, 2021

Vias in composite IC chip structures

INTEL CORP3 citations71
US10942562B2Mar 9, 2021

Methods and apparatus to manage operation of variable-state computing devices using artificial intelligence

INTEL CORP3 citations71
US10659046B2May 19, 2020

Local cell-level power gating switch

INTEL CORP1 citations63
US12376342B2Jul 29, 2025

Passivation layers for thin film transistors

INTEL CORP0 citations62
US12349416B2Jul 1, 2025

Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures

INTEL CORP0 citations62
US11955560B2Apr 9, 2024

Passivation layers for thin film transistors and methods of fabrication

INTEL CORP1 citations62
US11777029B2Oct 3, 2023

Vertical transistors for ultra-dense logic and memory applications

INTEL CORP0 citations62
US11749649B2Sep 5, 2023

Composite IC chips including a chiplet embedded within metallization layers of a host IC chip

INTEL CORP0 citations62
US10998302B2May 4, 2021

Packaged device with a chiplet comprising memory resources

INTEL CORP0 citations62
US12066833B2Aug 20, 2024

Computer-assisted or autonomous driving assisted by roadway navigation broadcast

INTEL CORP0 citations61
US11822410B2Nov 21, 2023

Multi-die stacks with power management

INTEL CORP0 citations61
US11694986B2Jul 4, 2023

Vias in composite IC chip structures

INTEL CORP0 citations61
US11009890B2May 18, 2021

Computer-assisted or autonomous driving assisted by roadway navigation broadcast

INTEL CORP0 citations61
US11222895B2Jan 11, 2022

Embedded memory employing self-aligned top-gated thin film transistors

INTEL CORP0 citations52
US10644112B2May 5, 2020

Systems, methods and devices for isolation for subfin leakage

INTEL CORP0 citations52
US9865684B2Jan 9, 2018

Nanoscale structure with epitaxial film having a recessed bottom portion

INTEL CORP0 citations52
US11348909B2May 31, 2022

Multi-die packages with efficient memory storage

INTEL CORP0 citations49

ADVANCED MICRO DEVICES INC

3 patents

RADOSAVLJEVIC MARKO

1 patent