Inventor
KOEPLINGER DAVID ALAN
US16 patents
Patents
16 patentsUS11080227B2Aug 3, 2021
Compiler flow logic for reconfigurable architectures
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US10768899B2Sep 8, 2020
Matrix normal/transpose read and a reconfigurable data processor including same
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US11709664B2Jul 25, 2023
Anti-congestion flow control for reconfigurable processors
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US11237971B1Feb 1, 2022
Compile time logic for detecting streaming compatible and broadcast compatible data access patterns
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US11714780B2Aug 1, 2023
Compiler flow logic for reconfigurable architectures
SAMBANOVA SYSTEMS INC2 citations73
US11782729B2Oct 10, 2023
Runtime patching of configuration files
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US11645057B2May 9, 2023
Systems and methods for memory layout determination and conflict resolution
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US12260199B2Mar 25, 2025
Merging skip-buffers in a reconfigurable dataflow processor
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US12254300B2Mar 18, 2025
Merging buffer access operations in a coarse-grained reconfigurable computing system
SAMBANOVA SYSTEMS INC1 citations61
US12236220B2Feb 25, 2025
Flow control for reconfigurable processors
SAMBANOVA SYSTEMS INC0 citations61
US12105630B2Oct 1, 2024
Compile time logic for inserting a buffer between a producer operation unit and a consumer operation unit in a dataflow graph
SAMBANOVA SYSTEMS INC0 citations60
US12164463B2Dec 10, 2024
Buffer splitting
SAMBANOVA SYSTEMS INC1 citations58
US12333283B2Jun 17, 2025
Iterative compilation to optimize translation in reconfigurable dataflow architectures
SAMBANOVA SYSTEMS INC0 citations56
US12373182B2Jul 29, 2025
Compiler-based input synchronization for processor with variant stage latencies
SAMBANOVA SYSTEMS INC0 citations52
US12386602B2Aug 12, 2025
Operation fusion in nested meta-pipeline loops
SAMBANOVA SYSTEMS INC0 citations49
US12430109B2Sep 30, 2025
Critical stage optimization for reconfigurable architectures
SAMBANOVA SYSTEMS INC0 citations47