Inventor
BERGERON PAUL H
US5 patents
Patents
5 patentsUS6609228B1Aug 19, 2003
Latch clustering for power optimization
IBM59 citations94
US4593362AJun 3, 1986
Bay packing method and integrated circuit employing same
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US7337415B2Feb 26, 2008
Systematic yield in semiconductor manufacture
IBM5 citations72
US7725864B2May 25, 2010
Systematic yield in semiconductor manufacture
IBM1 citations61
US7721240B2May 18, 2010
Systematic yield in semiconductor manufacture
IBM1 citations61