Inventor
WANG MAM-TSUNG
TW31 patents
⚠️ This page may combine multiple inventors who share the name “WANG MAM-TSUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MACRONIX INT CO LTD
27 patentsUS6040993AMar 21, 2000
Method for programming an analog/multi-level flash EEPROM
MACRONIX INT CO LTD142 citations98
US6215697B1Apr 10, 2001
Multi-level memory cell device and method for self-converged programming
MACRONIX INT CO LTD118 citations96
US6175519B1Jan 16, 2001
Virtual ground EPROM structure
MACRONIX INT CO LTD82 citations96
US6130452AOct 10, 2000
Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication
MACRONIX INT CO LTD45 citations96
US5912845AJun 15, 1999
Method and circuit for substrate current induced hot e- injection (SCIHE) approach for VT convergence at low VCC voltage
MACRONIX INT CO LTD49 citations96
US5837584ANov 17, 1998
Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication
MACRONIX INT CO LTD46 citations96
US5959892ASep 28, 1999
Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells
MACRONIX INT CO LTD88 citations93
US6031766AFeb 29, 2000
Method and circuit for substrate current induced hot e-injection (SCIHE) approach for VT convergence at low Vcc voltage
MACRONIX INT CO LTD34 citations92
US5963808AOct 5, 1999
Method of forming an asymmetric bird's beak cell for a flash EEPROM
MACRONIX INT CO LTD36 citations92
US5912844AJun 15, 1999
Method for flash EEPROM data writing
MACRONIX INT CO LTD37 citations92
US6614687B2Sep 2, 2003
Current source component with process tracking characteristics for compact programmed Vt distribution of flash EPROM
MACRONIX INT CO LTD24 citations91
US6455898B1Sep 24, 2002
Electrostatic discharge input protection for reducing input resistance
MACRONIX INT CO LTD25 citations91
US6166955ADec 26, 2000
Apparatus and method for programming of flash EPROM memory
MACRONIX INT CO LTD28 citations91
US6140682AOct 31, 2000
Self protected stacked NMOS with non-silicided region to protect mixed-voltage I/O pad from ESD damage
MACRONIX INT CO LTD46 citations91
US6121092ASep 19, 2000
Silicide blocking process to form non-silicided regions on MOS devices
MACRONIX INT CO LTD28 citations90
US6397377B1May 28, 2002
Method of performing optical proximity corrections of a photo mask pattern by using a computer
MACRONIX INT CO LTD20 citations89
US6055190AApr 25, 2000
Device and method for suppressing bit line column leakage during erase verification of a memory cell
MACRONIX INT CO LTD42 citations89
US6181604B1Jan 30, 2001
Method for fast programming of EPROMS and multi-level flash EPROMS
MACRONIX INT CO LTD14 citations74
US6028790AFeb 22, 2000
Method and device for programming a non-volatile memory cell by controlling source current pulldown rate
MACRONIX INT CO LTD8 citations74
US6269017B1Jul 31, 2001
Multi level mask ROM with single current path
MACRONIX INT CO LTD9 citations73
US6432782B1Aug 13, 2002
8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate
MACRONIX INT CO LTD13 citations72
US5828113AOct 27, 1998
Double density MROM array structure
MACRONIX INT CO LTD12 citations72
US6259140B1Jul 10, 2001
Silicide blocking process to form non-silicided regions on MOS devices
MACRONIX INT CO LTD10 citations71
US6046482AApr 4, 2000
Cell structure for mask ROM
MACRONIX INT CO LTD2 citations63
US6166943ADec 26, 2000
Method of forming a binary code of a ROM
MACRONIX INT CO LTD3 citations61
US5893738AApr 13, 1999
Method for forming double density MROM array structure
MACRONIX INT CO LTD2 citations61
US6525361B1Feb 25, 2003
Process and integrated circuit for a multilevel memory cell with an asymmetric drain
MACRONIX INT CO LTD1 citations48