Inventor
FUCHS KENNETH P
US18 patents
⚠️ This page may combine multiple inventors who share the name “FUCHS KENNETH P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HYUNDAI ELECTRONICS AMERICA
7 patentsUS6010963AJan 4, 2000
Global planarization using SOG and CMP
HYUNDAI ELECTRONICS AMERICA16 citations92
US6522005B1Feb 18, 2003
Integrated circuit device comprising low dielectric constant material for reduced cross talk
HYUNDAI ELECTRONICS AMERICA5 citations73
US6448653B1Sep 10, 2002
Method for using low dielectric constant material in integrated circuit fabrication
HYUNDAI ELECTRONICS AMERICA3 citations73
US6208029B1Mar 27, 2001
Integrated circuit device with reduced cross talk
HYUNDAI ELECTRONICS AMERICA8 citations73
US6504249B1Jan 7, 2003
Integrated circuit device with reduced cross talk
HYUNDAI ELECTRONICS AMERICA1 citations62
US6504250B1Jan 7, 2003
Integrated circuit device with reduced cross talk
HYUNDAI ELECTRONICS AMERICA2 citations62
US6522006B1Feb 18, 2003
Low dielectric constant material in integrated circuit
HYUNDAI ELECTRONICS AMERICA0 citations52
LSI LOGIC CORP
6 patentsUS6057571AMay 2, 2000
High aspect ratio, metal-to-metal, linear capacitor for an integrated circuit
LSI LOGIC CORP58 citations96
US6822282B2Nov 23, 2004
Analog capacitor in dual damascene process
LSI LOGIC CORP22 citations91
US6358837B1Mar 19, 2002
Method of electrically connecting and isolating components with vertical elements extending between interconnect layers in an integrated circuit
LSI LOGIC CORP16 citations84
US6596579B1Jul 22, 2003
Method of forming analog capacitor dual damascene process
LSI LOGIC CORP10 citations72
US7176082B2Feb 13, 2007
Analog capacitor in dual damascene process
LSI LOGIC CORP4 citations61
US6071817AJun 6, 2000
Isolation method utilizing a high pressure oxidation
LSI LOGIC CORP1 citations52
AT & T GLOBAL INF SOLUTION
4 patentsUS5447880ASep 5, 1995
Method for forming an amorphous silicon programmable element
AT & T GLOBAL INF SOLUTION20 citations92
US5438022AAug 1, 1995
Method for using low dielectric constant material in integrated circuit fabrication
AT & T GLOBAL INF SOLUTION20 citations92
US5543361AAug 6, 1996
Process for forming titanium silicide local interconnect
AT & T GLOBAL INF SOLUTION7 citations74
US5443996AAug 22, 1995
Process for forming titanium silicide local interconnect
AT & T GLOBAL INF SOLUTION7 citations74