Inventor

KIM NAM-SEOG

KR66 patents

⚠️ This page may combine multiple inventors who share the name “KIM NAM-SEOG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KIM NAM-SEOG

SAMSUNG ELECTRONICS CO LTD

Chip scale packages and methods for manufacturing the chip scale packages at wafer level

Semiconductor packages with enhanced joint reliability and methods of fabricating the same

Solder bump structure and method for forming a solder bump

Impedance control circuit

Programmable impedance control circuit

method for manufacturing a semiconductor package

Semiconductor packages and methods of fabricating the same

Reinforced solder bump structure and method for forming a reinforced solder bump

Programmable impedance control circuit

Programmable termination circuit and method

Semiconductor memory device with hierarchical bit line structure

Semiconductor device with impedance control circuit

Method for generating internal clock of semiconductor memory device and circuit thereof

Semiconductor package

Programmable impedance control circuit and method thereof

Apparatus and method for containing semiconductor chips to identify known good dies

Reinforced solder bump structure and method for forming a reinforced solder bump

Digital-to-time converter and operating method thereof

3D semiconductor device

Delay-locked loop circuits and method for generating transmission core clock signals

Semiconductor device having through electrode and method of fabricating the same

Semiconductor memory device with hierarchical bit line structure

Method of fabricating ultra thin flip-chip package

Impedance controller and impedance control method

Semiconductor memory device capable of generating variable clock signals according to modes of operation

Synchronous mirror delay circuit with adjustable locking range

Chip scale packages manufactured at wafer level

Semiconductor device bonding pad resistant to stress and method of fabricating the same

Circuits and methods for generating internal clock signal of intermediate phase relative to external clock

Signal converting system having level converter for use in high speed semiconductor device and method therefor

Impedance updating apparatus of termination circuit and impedance updating method thereof

Chip stack package and method of fabricating the same

Microelectronic devices including multiple through-silicon via structures on a conductive pad and methods of fabricating the same

Phase interpolation circuit and method of generating phase interpolation signal

Integrated circuit with on-chip termination

Method of outputting internal information through test pin of semiconductor memory and output circuit thereof

Delay circuit using current source

Frequency divider and a transceiver including the same

Method of forming solder bump with reduced surface defects

Wide-range local oscillator (LO) generators and apparatuses including the same

Programmable impedance controller and method for operating

Integrated circuit with adaptability to a process-voltage-temperature (PVT) variation

Integrated circuit with adaptability to a process-voltage-temperature (PVT) variation

Data line layout and line driving method in semiconductor memory device

KANG UK-SONG

3D semiconductor device

SAMSUNG TECHWIN CO LTD

Ag-pre-plated lead frame for semiconductor package

PARK SANG-WOOK

Wafer level package and methods of fabricating the same

(unassigned)

Digitally controllable internal clock generating circuit of semiconductor memory device and method for same

JO CHA-JEA

Method of manufacturing a chip stack package

LEE KYU-HA

Method of manufacturing the semiconductor device