Inventor

RABKIN PETER

US135 patents

⚠️ This page may combine multiple inventors who share the name “RABKIN PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RABKIN PETER

SANDISK TECHNOLOGIES INC

3D NAND with oxide semiconductor channel

Three-dimensional memory device containing CMOS devices over memory stack structures

Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device

Three dimensional NAND devices with air gap or low-k core

Three dimensional memory device containing aluminum source contact via structure and method of making thereof

Three-dimensional memory device having a transition metal dichalcogenide channel

NAND boosting using dynamic ramping of word line voltages

Memory cell with high-k charge trapping layer

Three-dimensional memory device having a heterostructure quantum well channel

3D memory having crystalline silicon NAND string channel

Vertical memory device with bit line air gap

Three dimensional NAND device with silicon germanium heterostructure channel

3D non-volatile storage with wide band gap transistor decoder

Thin film transistor

3D non-volatile storage with transistor decoding structure

Fabricating 3D non-volatile storage with transistor decoding structure

Method of making a three-dimensional memory device having a heterostructure quantum well channel

Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices

Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device

Ultrathin semiconductor channel three-dimensional memory devices

Band gap tailoring for a tunneling dielectric for a three-dimensional memory structure

SANDISK TECHNOLOGIES LLC

Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof

Ferroelectric memory devices containing a two-dimensional charge carrier gas channel and methods of making the same

Metal contact via structure surrounded by an air gap and method of making thereof

Multiple liner interconnects for three dimensional memory devices and method of making thereof

Resistive three-dimensional memory device with heterostructure semiconductor local bit line and method of making thereof

3D NAND with partial block erase

Three-dimensional memory device with vertical field effect transistors and method of making thereof

Bonded assembly employing metal-semiconductor bonding and metal-metal bonding and methods of forming the same

Three-dimensional memory device including a silicon-germanium source contact layer and method of making the same

Porous barrier layer for improving reliability of through-substrate via structures and methods of forming the same

Erase operation in 3D NAND

Non-volatile memory with multiple wells for word line switch transistors

Interfacial tilt-resistant bonded assembly and methods for forming the same

Bonded assembly containing a dielectric bonding pattern definition layer and methods of forming the same

Bonded die assembly containing partially filled through-substrate via structures and methods for making the same

NAND structure with tier select gate transistors

HIGASHITANI MASAAKI

3D non-volatile memory with metal silicide interconnect

Method for fabricating passive devices for 3D non-volatile memory

Passive devices for 3D non-volatile memory

Method for fabricating a metal silicide interconnect in 3D non-volatile memory

HYNIX SEMICONDUCTOR AMERICA INC

Non-volatile memory cells with selectively formed floating gate

Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications

Non-volatile memory cells with selectively formed floating gate

SANDISK 3D LLC

Vertical TFT with tunnel barrier

Vertical bit line wide band gap TFT decoder

HYNIX SEMICONDUCTOR INC

Polysilicon layers structure and method of forming same

Transistor with ultra-short gate feature and method of fabricating the same

ALSMEIER JOHANN

Vertical NAND device with low capacitance and silicided word lines

RABKIN PETER

Memory system with reversible resistivity-switching using pulses of alternatrie polarity