Inventor

CHETLUR SUNDAR

US34 patents

⚠️ This page may combine multiple inventors who share the name “CHETLUR SUNDAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHETLUR SUNDAR

ALLEGRO MICROSYSTEMS LLC

Systems and methods for integrated shielding in a current sensor

Magnetoresistance structure including two hard masks

Patterning of a magnetoresistance structure including two hard masks

Method of multiple gate oxide forming with hard mask

Fabricating a coil above and below a magnetoresistance element

Fabricating planarized coil layer in contact with magnetoresistance element

Systems and methods for integrated shielding in a current sensor

Electronic circuit structure and method of fabricating electronic circuit structure having magnetoresistance element with improved electrical contacts

Signal isolator having interposer

Metal-oxide semiconductor (MOS) device structure based on a poly-filled trench isolation region

Dual circuit digital isolator

Electrostatic discharge protection

Fabricating an electroconductive contact on a top surface of a tunneling magnetoresistance element

Systems and methods for integrated shielding in a current sensor

TMR assembly having a heat sink

Metal-oxide semiconductor (MOS) device structure based on a poly-filled trench isolation region

Double-diffused metal-oxide-semiconductor transistor including a recessed dielectric

Multi-terminal devices using magnetoresistance elements

Magnetoresistive sensor having seed layer hysteresis suppression

Dual circuit digital isolator

Method and apparatus for eliminating bit disturbance errors in non-volatile memory devices

Method and apparatus for eliminating EEPROM bit-disturb

Multi-layer integrated circuit with enhanced thermal dissipation using back-end metal layers

Methods and apparatus for electrical overstress protection

Fabricating an electroconductive contact on a top layer of a tunneling magnetoresistance element using two hard masks

Hall effect device with trench about a micron or greater in depth

Method of manufacturing magnetoresistance element using laser pinning process

Circuits having enhanced electrical isolation

Flash memory cell structure having separate program and erase electron paths

Snapback electrostatic discharge protection device with tunable parameters

AGERE SYSTEMS INC

Non-contact method for determining quality of semiconductor dielectrics

Method of creating hydrogen isotope reservoirs in a semiconductor device

LUCENT TECHNOLOGIES INC

Method for determining the hot carrier lifetime of a transistor

TELEFUNKEN Semiconductors AMERICA LLC

Method of forming a backside contact structure having selective side-wall isolation