Inventor
WEGER ALAN J
US25 patents
⚠️ This page may combine multiple inventors who share the name “WEGER ALAN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
21 patentsUS7886172B2Feb 8, 2011
Method of virtualization and OS-level thermal management and multithreaded processor with virtualization and OS-level thermal management
IBM43 citations94
US6943578B1Sep 13, 2005
Method and application of PICA (picosecond imaging circuit analysis) for high current pulsed phenomena
IBM24 citations91
US9081049B2Jul 14, 2015
Minimum-spacing circuit design and layout for PICA
IBM4 citations84
US7446550B2Nov 4, 2008
Enhanced signal observability for circuit analysis
IBM10 citations84
US7167806B2Jan 23, 2007
Method and system for measuring temperature and power distribution of a device
IBM16 citations84
US7698114B2Apr 13, 2010
Techniques for distributing power in electronic circuits and computer systems
IBM16 citations80
US7788058B2Aug 31, 2010
Method and apparatus for diagnosing broken scan chain based on leakage light emission
IBM7 citations73
US7426448B2Sep 16, 2008
Method and apparatus for diagnosing broken scan chain based on leakage light emission
IBM6 citations73
US10147175B2Dec 4, 2018
Detection of hardware trojan using light emissions with sacrificial mask
IBM2 citations71
US10102090B2Oct 16, 2018
Non-destructive analysis to determine use history of processor
IBM2 citations71
US7355419B2Apr 8, 2008
Enhanced signal observability for circuit analysis
IBM5 citations63
US9261561B2Feb 16, 2016
Scan chain latch design that improves testability of integrated circuits
IBM2 citations61
US6909295B2Jun 21, 2005
Analysis methods of leakage current luminescence in CMOS circuits
IBM5 citations59
US9086457B2Jul 21, 2015
Scan chain latch design that improves testability of integrated circuits
IBM1 citations58
US9930325B2Mar 27, 2018
Minimum-spacing circuit design and layout for PICA
IBM0 citations52
US6963811B2Nov 8, 2005
Method and apparatus for improved detection of multisynchronous signals title
IBM0 citations52
US10552278B2Feb 4, 2020
Non-destructive analysis to determine use history of processor
IBM0 citations51
US10571520B2Feb 25, 2020
Scan chain latch design that improves testability of integrated circuits
IBM0 citations50
US9678152B2Jun 13, 2017
Scan chain latch design that improves testability of integrated circuits
IBM0 citations50
US9372231B2Jun 21, 2016
Scan chain latch design that improves testability of integrated circuits
IBM0 citations50
US7477961B2Jan 13, 2009
Equivalent gate count yield estimation for integrated circuit devices
IBM0 citations36