Inventor
GHYSELEN BRUNO
FR112 patents
⚠️ This page may combine multiple inventors who share the name “GHYSELEN BRUNO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
43 patentsUS6867067B2Mar 15, 2005
Methods for fabricating final substrates
SOITEC SILICON ON INSULATOR172 citations99
US6794276B2Sep 21, 2004
Methods for fabricating a substrate
SOITEC SILICON ON INSULATOR175 citations99
US6955971B2Oct 18, 2005
Semiconductor structure and methods for fabricating same
SOITEC SILICON ON INSULATOR92 citations98
US7018909B2Mar 28, 2006
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
SOITEC SILICON ON INSULATOR51 citations96
US6953736B2Oct 11, 2005
Process for transferring a layer of strained semiconductor material
SOITEC SILICON ON INSULATOR55 citations96
US6858107B2Feb 22, 2005
Method of fabricating substrates, in particular for optics, electronics or optoelectronics
SOITEC SILICON ON INSULATOR55 citations96
US7741678B2Jun 22, 2010
Semiconductor substrates having useful and transfer layers
SOITEC SILICON ON INSULATOR14 citations93
US7655537B2Feb 2, 2010
Semiconductor substrates having useful and transfer layers
SOITEC SILICON ON INSULATOR10 citations93
US7534701B2May 19, 2009
Process for transferring a layer of strained semiconductor material
SOITEC SILICON ON INSULATOR24 citations93
US7465991B2Dec 16, 2008
Semiconductor substrates having useful and transfer layers
SOITEC SILICON ON INSULATOR14 citations93
US7422957B2Sep 9, 2008
Semiconductor substrates having useful and transfer layers
SOITEC SILICON ON INSULATOR9 citations93
US7348260B2Mar 25, 2008
Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
SOITEC SILICON ON INSULATOR21 citations93
US7288430B2Oct 30, 2007
Method of fabricating heteroepitaxial microstructures
SOITEC SILICON ON INSULATOR15 citations93
US7268060B2Sep 11, 2007
Method for fabricating a substrate with useful layer on high resistivity support
SOITEC SILICON ON INSULATOR37 citations93
US7235462B2Jun 26, 2007
Methods for fabricating a substrate
SOITEC SILICON ON INSULATOR36 citations93
US7071029B2Jul 4, 2006
Methods for fabricating final substrates
SOITEC SILICON ON INSULATOR18 citations93
US6964914B2Nov 15, 2005
Method of manufacturing a free-standing substrate made of monocrystalline semi-conductor material
SOITEC SILICON ON INSULATOR44 citations93
US7839001B2Nov 23, 2010
Methods for making substrates and substrates formed therefrom
SOITEC SILICON ON INSULATOR15 citations92
US7407867B2Aug 5, 2008
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
SOITEC SILICON ON INSULATOR19 citations92
US7018910B2Mar 28, 2006
Transfer of a thin layer from a wafer comprising a buffer layer
SOITEC SILICON ON INSULATOR30 citations92
US7001826B2Feb 21, 2006
Wafer with a relaxed useful layer and method of forming the wafer
SOITEC SILICON ON INSULATOR19 citations92
US6991956B2Jan 31, 2006
Methods for transferring a thin layer from a wafer having a buffer layer
SOITEC SILICON ON INSULATOR23 citations92
US7008857B2Mar 7, 2006
Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
SOITEC SILICON ON INSULATOR16 citations91
US6902988B2Jun 7, 2005
Method for treating substrates for microelectronics and substrates obtained by said method
SOITEC SILICON ON INSULATOR20 citations91
US7939428B2May 10, 2011
Methods for making substrates and substrates formed therefrom
SOITEC SILICON ON INSULATOR7 citations84
US7888235B2Feb 15, 2011
Fabrication of substrates with a useful layer of monocrystalline semiconductor material
SOITEC SILICON ON INSULATOR7 citations84
US7736988B2Jun 15, 2010
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
SOITEC SILICON ON INSULATOR9 citations84
US7646038B2Jan 12, 2010
Method of fabricating heteroepitaxial microstructures
SOITEC SILICON ON INSULATOR11 citations84
US7622330B2Nov 24, 2009
Semiconductor substrates having useful and transfer layers
SOITEC SILICON ON INSULATOR8 citations84
US7476930B2Jan 13, 2009
Multi-gate FET with multi-layer channel
SOITEC SILICON ON INSULATOR9 citations84
US7407869B2Aug 5, 2008
Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material
SOITEC SILICON ON INSULATOR12 citations84
US7262113B2Aug 28, 2007
Methods for transferring a useful layer of silicon carbide to a receiving substrate
SOITEC SILICON ON INSULATOR12 citations84
US7232488B2Jun 19, 2007
Method of fabrication of a substrate for an epitaxial growth
SOITEC SILICON ON INSULATOR10 citations84
US6974760B2Dec 13, 2005
Methods for transferring a useful layer of silicon carbide to a receiving substrate
SOITEC SILICON ON INSULATOR14 citations84
US6855619B2Feb 15, 2005
Method and device for making substrates
SOITEC SILICON ON INSULATOR18 citations84
US7256075B2Aug 14, 2007
Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer
SOITEC SILICON ON INSULATOR20 citations83
US7615468B2Nov 10, 2009
Methods for making substrates and substrates formed therefrom
SOITEC SILICON ON INSULATOR12 citations82
US7338883B2Mar 4, 2008
Process for transferring a layer of strained semiconductor material
SOITEC SILICON ON INSULATOR4 citations74
US7265029B2Sep 4, 2007
Fabrication of substrates with a useful layer of monocrystalline semiconductor material
SOITEC SILICON ON INSULATOR6 citations74
US7256101B2Aug 14, 2007
Methods for preparing a semiconductor assembly
SOITEC SILICON ON INSULATOR9 citations74
US7078353B2Jul 18, 2006
Indirect bonding with disappearance of bonding layer
SOITEC SILICON ON INSULATOR8 citations74
US7067393B2Jun 27, 2006
Substrate assembly for stressed systems
SOITEC SILICON ON INSULATOR5 citations74
US7009270B2Mar 7, 2006
Substrate for stressed systems and method of making same
SOITEC SILICON ON INSULATOR7 citations74
COMMISSARIAT ENERGIE ATOMIQUE
6 patentsUS6991995B2Jan 31, 2006
Method of producing a semiconductor structure having at least one support substrate and an ultrathin layer
COMMISSARIAT ENERGIE ATOMIQUE54 citations96
US7902038B2Mar 8, 2011
Detachable substrate with controlled mechanical strength and method of producing same
COMMISSARIAT ENERGIE ATOMIQUE50 citations94
US7498245B2Mar 3, 2009
Embrittled substrate and method for making same
COMMISSARIAT ENERGIE ATOMIQUE25 citations92
US7615463B2Nov 10, 2009
Method for making thin layers containing microcomponents
COMMISSARIAT ENERGIE ATOMIQUE19 citations82
US6936523B2Aug 30, 2005
Two-stage annealing method for manufacturing semiconductor substrates
COMMISSARIAT ENERGIE ATOMIQUE15 citations82
US7115481B2Oct 3, 2006
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
COMMISSARIAT ENERGIE ATOMIQUE10 citations74
THOMSON CSF
1 patentShowing the top 50 of 112 patents by PatentIndex Score.