Inventor

GRISE GARY D

US20 patents

⚠️ This page may combine multiple inventors who share the name “GRISE GARY D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GRISE GARY D

IBM

Non-volatile memory cell having Si rich silicon nitride charge trapping layer

IC chip at-functional-speed testing with process coverage evaluation

Integrated heat exchanger for memory module

Clock control circuit for test that facilitates an at speed structural test

Integrated test waveform generator (TWG) and customer waveform generator (CWG), design structure and method

System and method for generating at-speed structural tests to improve process and environmental parameter space coverage

Functional frequency testing of integrated circuits

Microcontroller for logic built-in self test (LBIST)

Apparatus and method for selectively implementing launch off scan capability in at speed testing

Dense electrically alterable read only memory

Functional frequency testing of integrated circuits

Functional frequency testing of integrated circuits

Non-inverting non-volatile dynamic RAM cell

Design structure for shutting off data capture across asynchronous clock domains during at-speed testing

Method and apparatus for shutting off data capture across asynchronous clock domains during at-speed testing

Method of increasing path coverage in transition test generation

Identifying sequential functional paths for IC testing methods and system

GRISE GARY D

Microcontroller for logic built-in self test (LBIST)

Microcontroller for logic built-in self test (LBIST)

Clock edge grouping for at-speed test