Inventor

ZOLOTOV VLADIMIR

US76 patents

⚠️ This page may combine multiple inventors who share the name “ZOLOTOV VLADIMIR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZOLOTOV VLADIMIR

IBM

Method, system, and program product for computing a yield gradient from statistical timing

IC chip at-functional-speed testing with process coverage evaluation

System and method for accommodating non-Gaussian and non-linear sources of variation in statistical static timing analysis

Method and apparatus for statistical path selection for at-speed testing

System and method of criticality prediction in statistical timing analysis

Fast path traversal in a relational database-based graph structure

Timing optimization driven by statistical sensitivites

Dynamic voltage frequency scaling

Modeling multi-patterning variability with statistical timing

Systems and methods for correlated parameters in statistical static timing analysis

Hierarchical design of integrated circuits with multi-patterning requirements

Reducing runtime and memory requirements of static timing analysis

Systems and methods for correlated parameters in statistical static timing analysis

Parasitic extraction in an integrated circuit with multi-patterning requirements

Frequency selection with selective voltage binning

Performing statistical timing analysis with non-separable statistical and deterministic variations

Method for performing a parallel static timing analysis using thread-specific sub-graphs

System and method for generating at-speed structural tests to improve process and environmental parameter space coverage

Methods for conserving memory in statistical static timing analysis

Representing and propagating a variational voltage waveform in statistical static timing analysis of digital circuits

Method, system, and program product for accommodating spatially-correlated variation in a process parameter

Selection of corners and/or margins using statistical static timing analysis of an integrated circuit

Multi-sided variations for creating integrated circuits

Selection of corners and/or margins using statistical static timing analysis of an integrated circuit

Runtime of CUBLAS matrix multiplication on GPU

Cross-talk noise computation using mixed integer linear program problems and their solutions

Modeling multi-patterning variability with statistical timing

Large model support in deep learning

Neural network training using a data flow graph and dynamic memory management

Analysis of coupled noise for integrated circuit design

Fast path traversal in a relational database-based graph structure

Method and apparatus for computing test margins for at-speed testing

Method and apparatus for incrementally computing criticality and yield gradient

Large model support in deep learning

Partial parameters and projection thereof included within statistical timing analysis

Modeling multi-patterning variability with statistical timing

Hierarchical design of integrated circuits with multi-patterning requirements

VISWESWARIAH CHANDRAMOULI

Yield computation and optimization for selective voltage binning

Method and apparatus for generating test patterns for use in at-speed testing

KALAFALA KERIM

Method of measuring the impact of clock skew on slack during a statistical static timing analysis

System and method for performing static timing analysis in the presence of correlations between asserted arrival times

HEMMETT JEFFREY G

Performing statistical timing analysis with non-separable statistical and deterministic variations

Methods for statistical slew propagation during block-based statistical static timing analysis

GLOBALFOUNDRIES INC

Dynamic and adaptive timing sensitivity during static timing analysis using look-up table

FOREMAN ERIC A

Systems and methods for correlated parameters in statistical static timing analysis

BUCK NATHAN C

Method, system and program storage device for performing a parameterized statistical static timing analysis (SSTA) of an integrated circuit taking into account setup and hold margin interdependence

DUBUQUE JOHN P

Statistical single library including on chip variation for rapid timing and power analysis

BICKFORD JEANNE P

Adaptive power control using timing canonicals

SINHA DEBJIT

Method of performing timing analysis on integrated circuit chips with consideration of process variations

BUCK NATHAN

Statistical clock cycle computation