Inventor

GANAPATHY KUMAR

US74 patents

⚠️ This page may combine multiple inventors who share the name “GANAPATHY KUMAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GANAPATHY KUMAR

INTEL CORP

Method and apparatus for distributed direct memory access for systems on chip

DSP data type matching for operation using multiple functional units

Distributed direct memory access for systems on chip

Tables with direct memory access descriptor lists for distributed direct memory access

Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus

Unified shared pipeline allowing deactivation of RISC/DSP units for power saving

DSP operations with permutation of vector complex data type operands

Methods and apparatuses for signal processing

Method and apparatus for a unified RISC/DSP pipeline controller for both reduced instruction set computer (RISC) control instructions and digital signal processing (DSP) instructions

Method and apparatus for loop buffering digital signal processing instructions

Processors with data typer and aligner selectively coupling data bits of data buses to adder and multiplier functional blocks to execute instructions with flexible data types

Dyadic operations instruction processor with configurable functional blocks

Method and apparatus for distributed direct memory access for systems on chip

Method and apparatus for distributed direct memory access for systems on chip

Dyadic DSP instruction processor with main and sub-operation functional blocks selected from each set of multiplier and adder

Dyadic DSP instructions for digital signal processors

Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously

VIRIDENT SYSTEMS INC

Integrating data from symmetric and asymmetric memory

Asymmetric memory migration in hybrid main memory

Systems and apparatus with programmable memory control for heterogeneous main memory

Systems and apparatus for main memory with non-volatile type memory modules, and related technologies

Writing to asymmetric memory

Seamless application access to hybrid main memory

Asymmetric memory migration in hybrid main memory

Systems and apparatus for main memory

Main memory in a system with a memory controller configured to control access to non-volatile memory, and related technologies

Methods for main memory in a system with a memory controller configured to control access to non-volatile memory, and related technologies

Methods for main memory with non-volatile type memory modules, and related technologies

Asymmetric memory migration in hybrid main memory

Seamless application access to hybrid main memory

Integrating data from symmetric and asymmetric memory

System and apparatus with a memory controller configured to control access to randomly accessible non-volatile memory

KARAMCHETI VIJAY

Seamless application access to hybrid main memory

Asymmetric memory migration in hybrid main memory

Systems for two-dimensional main memory including memory modules with read-writeable non-volatile memory devices

Handling writes to a memory including asymmetric and symmetric components

Asymmetric memory migration in hybrid main memory

Random read and read/write block accessible memory

Writing to asymmetric memory

Seamless application access to hybrid main memory

Integrating data from symmetric and asymmetric memory

Non-volatile type memory modules for main memory

Memory modules for two-dimensional main memory

Methods for a random read and read/write block accessible memory

Network computing systems having shared memory clouds with addresses of disk-read-only memories mapped into processor address spaces

Integrating data from symmetric and asymmetric memory

OKIN KENNETH ALAN

Programmable heterogeneous memory controllers for main memory with different memory modules

Systems with programmable heterogeneous memory controllers for main memory

CONEXANT SYSTEMS INC

Method for dynamic allocation and efficient sharing of functional unit datapaths

VXTEL INC

Method and apparatus for saturated multiplication and accumulation in an application specific signal processor