Inventor

JALLICE DERWIN

US4 patents

⚠️ This page may combine multiple inventors who share the name “JALLICE DERWIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

1 patent

US7692946B2Apr 6, 2010

Memory array on more than one die

INTEL CORP40 citations91

BAE SYSTEMS INFORMATION

1 patent

US6285580B1Sep 4, 2001

Method and apparatus for hardening a static random access memory cell from single event upsets

BAE SYSTEMS INFORMATION26 citations90

LOCKHEED CORP

1 patent

US6208554B1Mar 27, 2001

Single event upset (SEU) hardened static random access memory cell

LOCKHEED CORP30 citations90

TAUFIQUE MOHAMMED H

1 patent

US8059441B2Nov 15, 2011

Memory array on more than one die

TAUFIQUE MOHAMMED H2 citations58