Inventor
HAGEMEYER PETER
DE3 patents
Patents
3 patentsUS7713810B2May 11, 2010
Method for fabricating a layer arrangement, layer arrangement and memory arrangement
INFINEON TECHNOLOGIES AG26 citations89
US6768166B2Jul 27, 2004
Vertical transistor, memory arrangement and method for fabricating a vertical transistor
INFINEON TECHNOLOGIES AG27 citations87
US7064377B2Jun 20, 2006
Flash memory cell with buried floating gate and method for operating such a flash memory cell
INFINEON TECHNOLOGIES AG6 citations59