Inventor
ALAAN URUSA
US22 patents
Patents
22 patentsUS11996411B2May 28, 2024
Stacked forksheet transistors
INTEL CORP4 citations74
US11830788B2Nov 28, 2023
Integrated circuits and methods for forming integrated circuits
INTEL CORP2 citations72
US11171239B2Nov 9, 2021
Transistor channel passivation with 2D crystalline material
INTEL CORP2 citations72
US11569231B2Jan 31, 2023
Non-planar transistors with channel regions having varying widths
INTEL CORP3 citations69
US12581927B2Mar 17, 2026
Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication
INTEL CORP0 citations62
US12400913B2Aug 26, 2025
Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication
INTEL CORP0 citations62
US12349442B2Jul 1, 2025
Thin film transistors having semiconductor structures integrated with 2D channel materials
INTEL CORP0 citations62
US12328946B2Jun 10, 2025
ESD protection decoupled from diffusion
INTEL CORP0 citations62
US12211794B2Jan 28, 2025
Integrated circuits and methods for forming thin film crystal layers
INTEL CORP0 citations62
US12107170B2Oct 1, 2024
Transistor channel passivation with 2D crystalline material
INTEL CORP0 citations62
US12057388B2Aug 6, 2024
Integrated circuit structures having linerless self-forming barriers
INTEL CORP0 citations62
US11888034B2Jan 30, 2024
Transistors with metal chalcogenide channel materials
INTEL CORP1 citations62
US11672133B2Jun 6, 2023
Vertically stacked memory elements with air gap
INTEL CORP1 citations62
US11594485B2Feb 28, 2023
Local interconnect with air gap
INTEL CORP0 citations62
US11482622B2Oct 25, 2022
Adhesion structure for thin film transistor
INTEL CORP0 citations62
US11276644B2Mar 15, 2022
Integrated circuits and methods for forming thin film crystal layers
INTEL CORP1 citations62
US11164809B2Nov 2, 2021
Integrated circuits and methods for forming integrated circuits
INTEL CORP0 citations62
US11594637B2Feb 28, 2023
Gate-all-around integrated circuit structures having fin stack isolation
INTEL CORP0 citations60
US12369399B2Jul 22, 2025
Gate-to-gate isolation for stacked transistor architecture via selective dielectric deposition structure
INTEL CORP0 citations52
US11670588B2Jun 6, 2023
Selectable vias for back end of line interconnects
INTEL CORP0 citations52
US11574910B2Feb 7, 2023
Device with air-gaps to reduce coupling capacitance and process for forming such
INTEL CORP0 citations52
US12432948B2Sep 30, 2025
Compositional engineering of Schottky diode
INTEL CORP0 citations51