Inventor

JANUS SCOTT

US67 patents

⚠️ This page may combine multiple inventors who share the name “JANUS SCOTT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JANUS SCOTT

INTEL CORP

Systems and methods for improving cache efficiency and utilization

Sparse optimizations for a matrix accelerator architecture

Cluster of scalar engines to accelerate intersection in leaf node

Graphics processor operation scheduling for deterministic latency

Surface normal vector processing mechanism

Techniques for shuffling video information

Systems and methods for cache optimization

Graphics processing unit processing and caching improvements

Systems and methods for improving cache efficiency and utilization

Multi-tile architecture for graphics operations

Sparse optimizations for a matrix accelerator architecture

Video refinement mechanism

Patch processing mechanism

Multi-tile memory management

Multi-tile graphics processor rendering

Point cloud viewpoint and scalable compression/decompression

Page cache system and method for multi-agent environments

Data prefetching for graphics data processing

Systems and methods for cache optimization

Systems and methods for cache optimization

Method and apparatus of spatially sparse convolution module for visual rendering and synthesis

Multi-tile memory management

Glare and occluded view compensation for automotive and other applications

Glare and occluded view compensation for automotive and other applications

Glare and occluded view compensation for automotive and other applications

Multi-tile memory management

Neural network processing for multi-object 3D modeling

Surface normal vector processing mechanism

Apparatus and method for a hierarchical beam tracer

Secure environment for graphics processing units

Graphics architecture including a neural network pipeline

Graphics processor with encrypted kernels

Graphics processor with encrypted kernels

Audio localization techniques for visual effects

Graphics processing unit processing and caching improvements

Graphics processing unit processing and caching improvements

Sparse optimizations for a matrix accelerator architecture

Glare and occluded view compensation for automotive and other applications

Systems and methods for error detection and control for embedded memory and compute elements

Multi-tile graphics processor rendering

Cluster of scalar engines to accelerate intersection in leaf node

Data prefetching for graphics data processing

Apparatus and method for a hierarchical beam tracer

Transport controlled video coding

Data prefetching for graphics data processing

Apparatus and method for a hierarchical beam tracer

Cluster of scalar engines to accelerate intersection in leaf node

KABURLASOS NIKOS

Selective post-processing of decoded video frames based on focus point determination

CHHABRA SIDDHARTHA

Secure video ouput path

JANUS SCOTT

Preventing pattern recognition in electronic code book encryption