Inventor
NEPPL FRANZ
DE22 patents
Patents
22 patentsUS4855245AAug 8, 1989
Method of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrate
SIEMENS AG266 citations99
US4510670AApr 16, 1985
Method for the manufacture of integrated MOS-field effect transistor circuits silicon gate technology having diffusion zones coated with silicide as low-impedance printed conductors
SIEMENS AG204 citations99
US4761384AAug 2, 1988
Forming retrograde twin wells by outdiffusion of impurity ions in epitaxial layer followed by CMOS device processing
SIEMENS AG154 citations97
US5597766AJan 28, 1997
Method for detaching chips from a wafer
SIEMENS AG45 citations92
US5034338AJul 23, 1991
Circuit containing integrated bipolar and complementary MOS transistors on a common substrate
SIEMENS AG30 citations92
US5013678AMay 7, 1991
Method of making an integrated circuit comprising load resistors arranged on the field oxide zones which separate the active transistor zones
SIEMENS AG25 citations92
US4912543AMar 27, 1990
Integrated semiconductor circuit having an external contacting track level consisting of aluminum or of an aluminum alloy
SIEMENS AG29 citations92
US4740479AApr 26, 1988
Method for the manufacture of cross-couplings between n-channel and p-channel CMOS field effect transistors of static write-read memories
SIEMENS AG28 citations92
US4680612AJul 14, 1987
Integrated semiconductor circuit including a tantalum silicide diffusion barrier
SIEMENS AG28 citations90
US4906585AMar 6, 1990
Method for manufacturing wells for CMOS transistor circuits separated by insulating trenches
SIEMENS AG28 citations88
US4505027AMar 19, 1985
Method of making MOS device using metal silicides or polysilicon for gates and impurity source for active regions
SIEMENS AG45 citations88
US4885617ADec 5, 1989
Metal-oxide semiconductor (MOS) field effect transistor having extremely shallow source/drain zones and silicide terminal zones, and a process for producing the transistor circuit
SIEMENS AG28 citations86
US4782033ANov 1, 1988
Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate
SIEMENS AG34 citations86
US4673968AJun 16, 1987
Integrated MOS transistors having a gate metallization composed of tantalum or niobium or their silicides
SIEMENS AG18 citations82
US4960489AOct 2, 1990
Method for self-aligned manufacture of contacts between interconnects contained in wiring levels arranged above one another in an integrated circuit
SIEMENS AG20 citations80
US5100811AMar 31, 1992
Integrated circuit containing bi-polar and complementary mos transistors on a common substrate and method for the manufacture thereof
SIEMENS AG13 citations74
US4884117ANov 28, 1989
Circuit containing integrated bipolar and complementary MOS transistors on a common substrate
SIEMENS AG13 citations74
US4874717AOct 17, 1989
Semiconductor circuit containing integrated bipolar and MOS transistors on a chip and method of producing same
SIEMENS AG13 citations74
US4640844AFeb 3, 1987
Method for the manufacture of gate electrodes formed of double layers of metal silicides having a high melting point and doped polycrystalline silicon
SIEMENS AG18 citations74
US4603472AAug 5, 1986
Method of making MOS FETs using silicate glass layer as gate edge masking for ion implantation
SIEMENS AG8 citations72
US4525378AJun 25, 1985
Method for manufacturing VLSI complementary MOS field effect circuits
SIEMENS AG14 citations72
US4803179AFeb 7, 1989
Methods for making neighboring wells for VLS1 CMOS components
SIEMENS AG16 citations70