Inventor

AGRAHARAM SAIRAM

US49 patents

⚠️ This page may combine multiple inventors who share the name “AGRAHARAM SAIRAM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AGRAHARAM SAIRAM

INTEL CORP

Interconnect structures with polymer core

Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat

Integrated circuit packages with reduced stress on die and associated substrates, assemblies, and systems

Metal-free frame design for silicon bridges for semiconductor packages

Metal-free frame design for silicon bridges for semiconductor packages

Metal-free frame design for silicon bridges for semiconductor packages

Integrated circuit devices including compliant material under bond pads and methods of fabrication

Multi-chip packaging

C4 joint reliability

Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat

Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat

Electronic package with narrow-factor via including finish layer

Warpage control for microelectronics packages

3D integrated circuit package with window interposer

Multiple wafer stack architecture to enable singulation

Open cavity bridge co-planar placement architectures and processes

Metal-free frame design for silicon bridges for semiconductor packages

Metal-free frame design for silicon bridges for semiconductor packages

Open cavity bridge power delivery architectures and processes

Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat

Multi-chip packaging

Multi-chip packaging

Multi-chip packaging

Multi-chip packaging

Warpage control for microelectronics packages

Microelectronic assemblies with through die attach film connections

Singulation of microelectronic components with direct bonding interfaces

Multichip semiconductor package including a bridge die disposed in a cavity having non-planar interconnects

Microelectronic structures including bridges

Wafer level passive heat spreader interposer to enable improved thermal solution for stacked dies in multi-chips package and warpage control

Integrated circuit package with spatially varied solder resist opening dimension

Edge-aligned template structure for integrated packages including an integrated circuit device within an opening of the template structure

Interconnect structures with polymer core

Non-rectangular electronic device components

Interconnect structures with polymer core

Enhancing shock resistance in semiconductor packages

Moisture seal coating of hybrid bonded stacked die package assembly

Integrated circuit packages with reduced stress on die and associated methods

Microelectronic structures including bridges

C4 joint reliability

Methods of forming stepped bumps and structures formed thereby

Systems, methods, and apparatuses for implementing a thermal solution for 3D packaging

PILLARISETTY RAVI

Passivation layer for flexible display

Wearable imaging sensor for communications

MALLIK DEBENDRA

3D integrated circuit package with window interposer

ZHENG TIEYU

Integrated circuit package with spatially varied solder resist opening dimension

SHI HUALIANG

Solution to deal with die warpage during 3D die-to-die stacking

ALEKSOV ALEKSANDAR

Flexible computing fabric

RAORANE DIGVIJAY A

Method to increase I/O density and reduce layer counts in BBUL packages